[Bug 1001114] New port: NXP LPC17XX Variant, Olimex LPC-1766-STK platform

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--- Comment #14 from John Dallaway <john@dallaway.org.uk> 2011-01-25 14:48:36 GMT ---
(In reply to comment #11)
> (In reply to comment #10)
> > (In reply to comment #7)
> 
> > 
> > I will look at your latest attachment...
> 
> Some brief notes:
> 
>    - mlt_cortexm_lpc17xx_inc.ldi - user section macro definition
>    - mlt_cortexm_lpc1766_rom.ldi - macro calls (2 sections)
>    - lpc17xx_misc.c - macros / function for section initialization
>    - hal_cortexm_lpc17xx_lpc1766stk.cdl - provides section name.
>    - target.ld - output linker script
> 
> This is just a functional model. Some macros are duplicated in
> mlt_cortexm_lpc17xx_inc.ldi and lpc17xx_misc.c - this will resolve when we put
> them in a header, i guess (but hadn't time to check) pkgconf/hal.h.
> 
> I would ask for double check of my usage of concatenation (#) in macros as I am
> not very much initiated in it's subtleties.

Ilija, I've looked at your user defined sections proposal. A few points for
discussion:

a) I'm still not convinced about placing these macros in a separate
mlt_cortexm_lpc17xx_inc.ldi file. There is nothing specific to LPC17xx in this
file so I think the new macros could go in cortex.ld to be used when relevant
and otherwise ignored.

b) Is it necessary to add the _type_ parameter, or could "(NOLOAD)" be passed
to the SECTION_usr() macro as part of the _vma_ parameter to keep the parameter
list for all SECTION_*() macros consistent?

c) Do we strictly need to implement "zero the bss" behaviour for peripheral
memory? Does lwIP require this? I'm wondering if we can simplify the
implementation by leaving zeroing of the memory section to the user if
necessary? In that case we could have SECTION_user0() and SECTION_user1()
macros which are completely generic, using one of these macros instead of
SECTION_ahb_bss().

Comments?

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