From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 24558 invoked by alias); 15 Aug 2011 20:17:59 -0000 Received: (qmail 24550 invoked by uid 22791); 15 Aug 2011 20:17:57 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from hagrid.ecoscentric.com (HELO mail.ecoscentric.com) (212.13.207.197) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 15 Aug 2011 20:17:43 +0000 Received: from localhost (hagrid.ecoscentric.com [127.0.0.1]) by mail.ecoscentric.com (Postfix) with ESMTP id DE5512F78009 for ; Mon, 15 Aug 2011 21:17:41 +0100 (BST) Received: from mail.ecoscentric.com ([127.0.0.1]) by localhost (hagrid.ecoscentric.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id yEBGi4QA+Jjm; Mon, 15 Aug 2011 21:17:40 +0100 (BST) From: bugzilla-daemon@bugs.ecos.sourceware.org To: ecos-patches@ecos.sourceware.org Subject: [Bug 1001275] Cortex-M (armV7) architecture endian instructions / Applied on lwIP X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: eCos X-Bugzilla-Component: Patches and contributions X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: sergei.gavrikov@gmail.com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: low X-Bugzilla-Assigned-To: unassigned@bugs.ecos.sourceware.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: In-Reply-To: References: X-Bugzilla-URL: http://bugs.ecos.sourceware.org/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Date: Mon, 15 Aug 2011 20:17:00 -0000 Message-Id: <20110815201739.DFC602F78001@mail.ecoscentric.com> Mailing-List: contact ecos-patches-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: ecos-patches-owner@ecos.sourceware.org X-SW-Source: 2011-08/txt/msg00001.txt.bz2 Please do not reply to this email. Use the web interface provided at: http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001275 --- Comment #2 from Sergei Gavrikov 2011-08-15 21:17:36 BST --- Hi Ijlija, Thank you for your attention to low-memory footprint eCos targets and your ideas around, i.e. how to utilize every bit on such CPUs :-) My $.02. Instead hal_arch_instr.h I would create _regs.h header file to define a few instructions in assembler. In your case it is cortexm_regs.h. NOTE: There are the precendents of such definitions in other architecture trees. I mean (snippets not tested!) #ifndef CYGONCE_HAL_CORTEXM_REGS_H #define CYGONCE_HAL_CORTEXM_REGS_H //==================================================== ... // // cortexm_regs.h // // Cortex-M CPU definitions // // ... #include #include // Macro to embed rev instructions in C code #define CYGARC_REV(_origin_, _swapped_) \ asm volatile( "rev %0, %1\n" \ : "=r" (_swapped_) \ : "r" (_origin_) \ ); #define CYGARC_REV16(_origin_, _swapped_) \ asm volatile( "rev16 %0, %1\n" \ : "=r" (_swapped_) \ : "r" (_origin_) \ ); // ---------------------------------------------------- ... // End of cortexm_regs.h #endif // ifdef CYGONCE_HAL_CORTEXM_REGS_H And then I would add only needed inline functions and declarations in some header file (again, not tested) #include #define LWIP_PLATFORM_HTONL( _hostlong_ ) hal_htol( _hostlong_ ) #define LWIP_PLATFORM_HTONS( _hostshort_ ) hal_htos( _hostshort_ ) static inline cyg_uint32 hal_htonl(cyg_uint32 hostslong) { cyg_uint32 netlong; CYGARC_REV(hostlong, netlong); return netlong; } static inline cyg_uint16 hal_htons(cyg_uint16 hostshort) { cyg_uint16 netshort; CYGARC_REV16(hostshort, netshort); return netshort; } But, I would resist to put them in hal_arch.h ... And it is mine only. By other hand lwipopts.h includes that header only. I thought it's pitty that we have hal_io.h, but not hal_net.h. Thus, we need more expert views on code's arrangement. Sergei -- Configure bugmail: http://bugs.ecos.sourceware.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are on the CC list for the bug.