From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 15518 invoked by alias); 23 Aug 2011 20:15:00 -0000 Received: (qmail 15505 invoked by uid 22791); 23 Aug 2011 20:14:55 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from hagrid.ecoscentric.com (HELO mail.ecoscentric.com) (212.13.207.197) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 23 Aug 2011 20:14:27 +0000 Received: from localhost (hagrid.ecoscentric.com [127.0.0.1]) by mail.ecoscentric.com (Postfix) with ESMTP id D21D62F7800B for ; Tue, 23 Aug 2011 21:14:24 +0100 (BST) Received: from mail.ecoscentric.com ([127.0.0.1]) by localhost (hagrid.ecoscentric.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bBP5oNIXktYw; Tue, 23 Aug 2011 21:14:22 +0100 (BST) From: bugzilla-daemon@bugs.ecos.sourceware.org To: ecos-patches@ecos.sourceware.org Subject: [Bug 1001275] Cortex-M (armV7) architecture endian instructions / Applied on lwIP X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: eCos X-Bugzilla-Component: Patches and contributions X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: ilijak@siva.com.mk X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: low X-Bugzilla-Assigned-To: unassigned@bugs.ecos.sourceware.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: In-Reply-To: References: X-Bugzilla-URL: http://bugs.ecos.sourceware.org/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Date: Tue, 23 Aug 2011 20:15:00 -0000 Message-Id: <20110823201422.295AA2F78004@mail.ecoscentric.com> Mailing-List: contact ecos-patches-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: ecos-patches-owner@ecos.sourceware.org X-SW-Source: 2011-08/txt/msg00025.txt.bz2 Please do not reply to this email. Use the web interface provided at: http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001275 --- Comment #24 from Ilija Kocho 2011-08-23 21:14:19 BST --- (In reply to comment #23) > (In reply to comment #19) > Regarding attachment 1348 [details] > > hal_cortexm.cdl (CYGIMP_HAL_ARCH_ENDIAN): reformatted according CDL > coding style, fixed a typo in description (s/bute/byte) and I would > have said > > + default_value 1 > + description " > + Cortex-M architecture implements instructions for endian > + manipulation (byte swapping). If enabled, this feature > + can produce shorter and faster code for that." OK. Thanks. > > cortexm_regs.h: > > Ilija, I missed that you have used such an order for arguments in REV > macros, for example > > +// Reverse word > +#define CYGARC_REV(_swapped_,_original_) \ > + __asm__ volatile ("rev %0, %1\n" : "=r"(_swapped_) : "r"(_original_)) > + > > It looks clear for ARM assembler gurus (dst <- src), and for C-guys it > looks a bit puzzled, (IMO) they are accustomed to same I would insist to keep present order. Here are some arguments: These macros shall be used mainly by people who are familiar with assembler and they would be surprised if order is not as in assembler. Also there is a long tradition the destination to be first argument in C functions. The origins date back to big-bang, look for rationale in K&R book. Examples strcpy(), strcat(), memcpy()... > #define HAL_READ_UINT32( _register_, _value_ ) \ What about HAL_WRITE_UINT32(__register__, value)? > > Still, I would use prototypes where result returns in the second > argument. And if you have no objections I would use multiline variants > for those macros. > > #define CYGARC_REV( _origin_, _swapped_ ) \ > asm volatile( "rev %0, %1\n" \ > : "=r" (_swapped_) \ > : "r" (_origin_) \ > ); I wouldn't object, only I don't see the need for it. Present layout doesn't stretch out of limits. As far as I have seen other architectures (coldfire, ppc) use same layout. Ilija -- Configure bugmail: http://bugs.ecos.sourceware.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are on the CC list for the bug.