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From: "Rene Nielsen" <rbn@vitesse.com>
To: <ecos-patches@sourceware.org>
Subject: RE: ARM9 Cache Handling
Date: Mon, 02 Mar 2009 16:18:00 -0000	[thread overview]
Message-ID: <376637F07F8A9242AD11921B15FA17DC8AF6C1@mx-dk.vsc.vitesse.com> (raw)
In-Reply-To: <376637F07F8A9242AD11921B15FA17DC8AF2DA@mx-dk.vsc.vitesse.com>

Hi again,

Sorry to bug you, but this patch is gating for the HAL Platform I'm
about to post, so if I could get you to have a look at it, I'd be happy.

Thanks,
Rene 

-----Original Message-----
From: ecos-patches-owner@ecos.sourceware.org
[mailto:ecos-patches-owner@ecos.sourceware.org] On Behalf Of Rene
Nielsen
Sent: 13. februar 2009 14:04
To: ecos-patches@sourceware.org
Subject: ARM9 Cache Handling

The attached patch contains several changes/additions to the ARM9
variants cache implementation:

The following changes affect all ARM9 variants:
1) In HAL_ICACHE_ENABLE(): Enabling the MMU should not be part of the
cache routines.
2) CYGSEM_HAL_FLASH_CACHES_NODISABLE: New CDL option for controlling how
HAL_FLASH_CACHES_OFF() and HAL_FLASH_CACHES_ON() are implemented. If it
is not defined or 0, it'll be the good old implementation. Otherwise,
these macros will be empty. Default for the option is not defined.

ARM926EJ-specific changes:
3) Parameterized HAL_DCACHE_SIZE and HAL_ICACHE_SIZE. Defaults remain 8
and 16 KBytes, respectively.
4) HAL_DCACHE_STORE(): New macro for flushing part of the D-cache to
memory.
5) HAL_DCACHE_INVALIDATE(): New macro for invalidating part of the
D-cache.
6) HAL_DCACHE_FLUSH(): New macro for flushing and invalidating part of
the D-cache.

Regards,
Rene Schipp von Branitz Nielsen
Vitesse Semiconductors

      reply	other threads:[~2009-03-02 16:18 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-02-13 13:03 Rene Nielsen
2009-03-02 16:18 ` Rene Nielsen [this message]

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