From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 17980 invoked by alias); 19 Sep 2008 11:34:37 -0000 Received: (qmail 17970 invoked by uid 22791); 19 Sep 2008 11:34:36 -0000 X-Spam-Status: No, hits=-2.3 required=5.0 tests=AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from atlantis.wh2.tu-dresden.de (HELO atlantis.wh2.tu-dresden.de) (141.30.228.39) by sourceware.org (qpsmtpd/0.31) with ESMTP; Fri, 19 Sep 2008 11:33:58 +0000 Received: from apfelbuch.mr.inf.tu-dresden.de (unknown [141.76.92.86]) by atlantis.wh2.tu-dresden.de (Postfix) with ESMTP id 29DAA2EC3E for ; Fri, 19 Sep 2008 13:33:55 +0200 (CEST) Message-Id: <68212FD3-93F1-41AD-9974-51879E4616AF@wh2.tu-dresden.de> From: Lars Poeschel To: ecos-patches@ecos.sourceware.org Content-Type: multipart/signed; protocol="application/pgp-signature"; micalg=pgp-sha1; boundary="Apple-Mail-14-851180208" Mime-Version: 1.0 (Apple Message framework v929.2) Subject: FR30 MB91301 cache support Date: Fri, 19 Sep 2008 11:34:00 -0000 X-Pgp-Agent: GPGMail d51 (Leopard) Content-Transfer-Encoding: 7bit X-Mailer: Apple Mail (2.929.2) X-Virus-Checked: Checked by ClamAV on sourceware.org X-IsSubscribed: yes Mailing-List: contact ecos-patches-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: ecos-patches-owner@ecos.sourceware.org X-SW-Source: 2008-09/txt/msg00037.txt.bz2 This is an OpenPGP/MIME signed message (RFC 2440 and 3156) --Apple-Mail-14-851180208 Content-Type: multipart/mixed; boundary=Apple-Mail-13-851180183 --Apple-Mail-13-851180183 Content-Type: text/plain; charset=US-ASCII; format=flowed; delsp=yes Content-Transfer-Encoding: 7bit Content-length: 174 Hello! I created a patch that adds cache support to the mb91301 variant of the fr30 architecture. The whole sram (4 kb) is used as an instruction cache. Regards, Lars --Apple-Mail-13-851180183 Content-Disposition: attachment; filename=cache.patch Content-Type: application/octet-stream; x-unix-mode=0644; name="cache.patch" Content-Transfer-Encoding: 7bit Content-length: 11443 diff -rbBu ecos.export/packages/hal/fr30/arch/current/ChangeLog ecos.fr30/packages/hal/fr30/arch/current/ChangeLog --- ecos.export/packages/hal/fr30/arch/current/ChangeLog 2008-07-11 19:59:26.000000000 +0200 +++ ecos.fr30/packages/hal/fr30/arch/current/ChangeLog 2008-09-19 11:56:47.000000000 +0200 @@ -1,3 +1,7 @@ +2008-09-19 Lars Poeschel + + * include/hal_cache.h: Basic cache support + 2008-07-01 Lars Poeschel * src/vectors.S: diff -rbBu ecos.export/packages/hal/fr30/arch/current/include/hal_cache.h ecos.fr30/packages/hal/fr30/arch/current/include/hal_cache.h --- ecos.export/packages/hal/fr30/arch/current/include/hal_cache.h 2008-01-06 15:17:43.000000000 +0100 +++ ecos.fr30/packages/hal/fr30/arch/current/include/hal_cache.h 2008-09-19 11:56:46.000000000 +0200 @@ -46,81 +46,134 @@ // // Author(s): larsi // Contributors: -// Date: 2007-07-09 +// Date: 2008-07-09 // Purpose: Cache control API // Description: The macros defined here provide the HAL APIs for handling // cache control operations. -// Usage: -// #include -// ... +// Usage: #include // //####DESCRIPTIONEND#### // //============================================================================= - +#include #include +#include + //----------------------------------------------------------------------------- // Cache dimensions -// Data cache -#define HAL_DCACHE_SIZE 4096 // Size of data cache in bytes -#define HAL_DCACHE_LINE_SIZE 16 // Size of a data cache line +// FR30 only has an instruction cache, so data cache macros are empty +#ifndef HAL_DCACHE_SIZES_DEFINED +#define HAL_DCACHE_SIZE 0 // Size of cache in bytes +#define HAL_DCACHE_LINE_SIZE 16 // Size of a cache line #define HAL_DCACHE_WAYS 2 // Associativity of the cache -// Instruction cache +#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) +#endif + +#ifndef HAL_ICACHE_SIZES_DEFINED #define HAL_ICACHE_SIZE 4096 // Size of cache in bytes #define HAL_ICACHE_LINE_SIZE 16 // Size of a cache line #define HAL_ICACHE_WAYS 2 // Associativity of the cache -#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS)) #define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS)) - +#endif //----------------------------------------------------------------------------- -// Global control of data cache +// Global control of the data cache +// FR30 only has an instruction cache, so data cache macros are empty -// Enable the data cache +// Enable the cache +#ifndef HAL_DCACHE_ENABLE_DEFINED #define HAL_DCACHE_ENABLE() +#endif -// Disable the data cache +// Disable the cache +#ifndef HAL_DCACHE_DISABLE_DEFINED #define HAL_DCACHE_DISABLE() +#endif -// Query the state of the data cache +// Query the state of the cache +#ifndef HAL_DCACHE_IS_ENABLED_DEFINED #define HAL_DCACHE_IS_ENABLED(_state_) \ CYG_MACRO_START \ _state_ = 1; \ CYG_MACRO_END +#endif // Invalidate the entire cache +#ifndef HAL_DCACHE_INVALIDATE_ALL_DEFINED #define HAL_DCACHE_INVALIDATE_ALL() +#endif -// Synchronize the contents of the cache with memory. +// Synchronize the contents of the cache to the memory +#ifndef HAL_DCACHE_SYNC_DEFINED #define HAL_DCACHE_SYNC() +#endif + +// Locks entry in the cache +#ifndef HAL_DCACHE_LOCK_DEFINED +#define HAL_DCACHE_LOCK(_base_, _size_) +#endif + +// Unlocks entry in the cache +#ifndef HAL_DCACHE_UNLOCK_DEFINED +#define HAL_DCACHE_UNLOCK(_base_, _size_) +#endif + +// Unlocks the whole cache. +#ifndef HAL_DCACHE_UNLOCK_ALL_DEFINED +#define HAL_DCACHE_UNLOCK_ALL() +#endif //----------------------------------------------------------------------------- -// Global control of Instruction cache +// Global control of the instruction cache -// Enable the instruction cache +// Enable the cache +#ifndef HAL_ICACHE_ENABLE_DEFINED #define HAL_ICACHE_ENABLE() +#endif -// Disable the instruction cache +// Disable the cache +#ifndef HAL_ICACHE_DISABLE_DEFINED #define HAL_ICACHE_DISABLE() +#endif -// Query the state of the instruction cache +// Query the state of the cache +#ifndef HAL_ICACHE_IS_ENABLED_DEFINED #define HAL_ICACHE_IS_ENABLED(_state_) \ CYG_MACRO_START \ _state_ = 1; \ CYG_MACRO_END +#endif // Invalidate the entire cache +#ifndef HAL_ICACHE_INVALIDATE_ALL_DEFINED #define HAL_ICACHE_INVALIDATE_ALL() +#endif -// Synchronize the contents of the cache with memory. +// Synchronize the contents of the cache to the memory. +#ifndef HAL_ICACHE_SYNC_DEFINED #define HAL_ICACHE_SYNC() +#endif -//----------------------------------------------------------------------------- -// Instruction cache line control - +// Locks entry in the cache, fr30 architecture does not support locking specifc +// regions, so _base_ and _size are ignored and the whole cache is locked. +// During cache lock only valid entries are locked. Invalid entries are updated. +#ifndef HAL_ICACHE_LOCK_DEFINED +#define HAL_ICACHE_LOCK(_base_, _size_) +#endif + +// Unlocks entry in the cache. fr30 architecture does not support locking specifc +// regions, so _base_ and _size are ignored and the whole cache is unlocked. +#ifndef HAL_ICACHE_UNLOCK_DEFINED +#define HAL_ICACHE_UNLOCK(_base_, _size_) +#endif + +// Unlocks the whole cache. +#ifndef HAL_ICACHE_UNLOCK_ALL_DEFINED +#define HAL_ICACHE_UNLOCK_ALL() +#endif //----------------------------------------------------------------------------- #endif // ifndef CYGONCE_HAL_CACHE_H Nur in ecos.fr30/packages/hal/fr30/arch/current/src: hal_syscall.c. diff -rbBu ecos.export/packages/hal/fr30/mb91301/current/ChangeLog ecos.fr30/packages/hal/fr30/mb91301/current/ChangeLog --- ecos.export/packages/hal/fr30/mb91301/current/ChangeLog 2008-07-11 20:00:23.000000000 +0200 +++ ecos.fr30/packages/hal/fr30/mb91301/current/ChangeLog 2008-09-19 11:56:47.000000000 +0200 @@ -1,3 +1,9 @@ +2008-09-19 Lars Poeschel + + * include/variant.inc: + * include/var_cache.h: Support the cache of the mb91301 variant, uses it as + 4 kb instruction cache. + 2008-07-01 Lars Poeschel * src/fr30_md91301.ld: Reworked memory layout for flash support. Nur in ecos.fr30/packages/hal/fr30/mb91301/current/include: var_cache.h. diff -rbBu ecos.export/packages/hal/fr30/mb91301/current/include/variant.inc ecos.fr30/packages/hal/fr30/mb91301/current/include/variant.inc --- ecos.export/packages/hal/fr30/mb91301/current/include/variant.inc 2008-07-11 20:00:23.000000000 +0200 +++ ecos.fr30/packages/hal/fr30/mb91301/current/include/variant.inc 2008-09-19 11:56:47.000000000 +0200 @@ -176,8 +176,11 @@ .equ FR30_MB91301_RTC_TMRLR, 0x50 .equ FR30_MB91301_RTC_TMR, 0x52 .equ FR30_MB91301_RTC_TMCSR, 0x56 - - +##----------------------------------------------------------------------------- +## registers for cache settings +## + .equ FR30_MB91301_CACHE_ISIZE, 0x307 + .equ FR30_MB91301_CACHE_ICHCR, 0x3e7 ##------------------------------------------------------------------------------ ## CPU initialisation macro @@ -337,5 +340,24 @@ #endif #------------------------------------------------------------------------------ +# Cache initialization. We use 4 kb Cache, although not so documented. +# The processor manual is not clear about this. +# r0 and r1 are polluted + +#ifndef CYGPKG_HAL_FR30_CACHE_DEFINED +#define CYGPKG_HAL_FR30_CACHE_DEFINED + + .macro hal_cache_init + + ldi:20 #FR30_MB91301_CACHE_ICHCR, r0 +# set (CYG_HAL_FR30_CACHE_ICHCR_RAM | CYG_HAL_FR30_CACHE_ICHCR_FLSH | +# CYG_HAL_FR30_CACHE_ICHCR_ELKR | CYG_HAL_FR30_CACHE_ICHCR_ENAB) + ldi:20 #0x87, r1 + stb r1, @r0 + .endm + +#endif + +#------------------------------------------------------------------------------ #endif // ifndef CYGONCE_HAL_VARIANT_INC # end of variant.inc diff -rbBu ecos.export/packages/hal/fr30/skmb91302/current/cdl/hal_fr30_skmb91302.cdl ecos.fr30/packages/hal/fr30/skmb91302/current/cdl/hal_fr30_skmb91302.cdl --- ecos.export/packages/hal/fr30/skmb91302/current/cdl/hal_fr30_skmb91302.cdl 2008-01-06 15:17:43.000000000 +0100 +++ ecos.fr30/packages/hal/fr30/skmb91302/current/cdl/hal_fr30_skmb91302.cdl 2008-09-19 11:56:47.000000000 +0200 @@ -153,7 +153,7 @@ display "Global compiler flags" flavor data no_define - default_value { "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -finit-priority -fomit-frame-pointer" } + default_value { "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fomit-frame-pointer -fno-use-cxa-atexit" } description "This option controls the global compiler flags which are used to compile all packages by default. Individual packages may define options which diff -rbBu ecos.export/packages/hal/fr30/skmb91302/current/ChangeLog ecos.fr30/packages/hal/fr30/skmb91302/current/ChangeLog --- ecos.export/packages/hal/fr30/skmb91302/current/ChangeLog 2008-07-11 20:02:04.000000000 +0200 +++ ecos.fr30/packages/hal/fr30/skmb91302/current/ChangeLog 2008-09-19 11:56:47.000000000 +0200 @@ -1,3 +1,7 @@ +2008-09-19 Lars Poeschel + + * include/plf_cache.h: Changed to the general arch-var-plf include scheme. + 2008-07-01 Lars Poeschel * src/platform.S: Startup routines for remapping the flash during diff -rbBu ecos.export/packages/hal/fr30/skmb91302/current/include/plf_cache.h ecos.fr30/packages/hal/fr30/skmb91302/current/include/plf_cache.h --- ecos.export/packages/hal/fr30/skmb91302/current/include/plf_cache.h 2008-01-06 15:17:43.000000000 +0100 +++ ecos.fr30/packages/hal/fr30/skmb91302/current/include/plf_cache.h 2008-09-19 11:56:47.000000000 +0200 @@ -44,26 +44,18 @@ //============================================================================= //#####DESCRIPTIONBEGIN#### // -// Author(s): nickg +// Author(s): Lars Poeschel // Contributors: -// Date: 2007-07-09 -// Purpose: Cache control API +// Date: 2008-07-09 +// Purpose: Cache control API for skmb91302 platform // Description: The macros defined here provide the HAL APIs for handling // cache control operations. -// Usage: -// #include -// ... -// +// Usage: Included via "hal_cache.h". Do not use directly. // //####DESCRIPTIONEND#### // //============================================================================= -#include -#include - -#include - //============================================================================= // Nothing here at present. --Apple-Mail-13-851180183 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Content-length: 1 --Apple-Mail-13-851180183-- --Apple-Mail-14-851180208 content-type: application/pgp-signature; x-mac-type=70674453; name=PGP.sig content-description: This is a digitally signed message part content-disposition: inline; filename=PGP.sig content-transfer-encoding: 7bit Content-length: 194 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (Darwin) iEYEARECAAYFAkjTjiAACgkQ3m3cZ1XsbwfnvwCfXJ8lZCistBSCx1TKVRXIuRVB NXkAn1OcpFo2MT6irP/7AMDNodOwT3tV =6hS+ -----END PGP SIGNATURE----- --Apple-Mail-14-851180208--