[PATCH] when building using binutils 2.20:

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* [PATCH] when building using binutils 2.20:
@ 2010-05-04 12:27 Spencer Oliver
  2010-05-12 13:12 ` Jonathan Larmour
  2010-05-17 11:40 ` Nick Garnett
  0 siblings, 2 replies; 5+ messages in thread
From: Spencer Oliver @ 2010-05-04 12:27 UTC (permalink / raw)
  To: ecos-patches

[-- Attachment #1: Type: text/plain, Size: 145 bytes --]

cortex_m3: buildfix for binutils 2.20

when building using binutils 2.20:
  - swi inst now requires an argument.
  - msr psp,sp is not allowed.


[-- Attachment #2: ecos.hg_rev2948.patch --]
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# HG changeset patch
# User Spencer Oliver <spen@spen-soft.co.uk>
# Date 1272975499 -3600
# Node ID d31e3aac03a66dd841d6b9a48c1261c00b437475
# Parent  9b59569aaea99c165f8b838325d2f6bd4951ab36
cortex_m3: buildfix for binutils 2.20

when building using binutils 2.20:
 - swi inst now requires an argument.
 - msr psp,sp is not allowed.

diff -r 9b59569aaea9 -r d31e3aac03a6 packages/hal/cortexm/arch/current/include/hal_intr.h
--- a/packages/hal/cortexm/arch/current/include/hal_intr.h	Fri Apr 23 12:01:39 2010 +0000
+++ b/packages/hal/cortexm/arch/current/include/hal_intr.h	Tue May 04 13:18:19 2010 +0100
@@ -298,7 +298,7 @@
 {                                                       \
     __asm__ volatile (                                  \
         "ldr     r3,=hal_call_dsrs_vsr          \n"     \
-        "swi                                    \n"     \
+        "swi 0                                  \n"     \
         :                                               \
         :                                               \
         : "r3"                                          \
diff -r 9b59569aaea9 -r d31e3aac03a6 packages/hal/cortexm/arch/current/src/hal_misc.c
--- a/packages/hal/cortexm/arch/current/src/hal_misc.c	Fri Apr 23 12:01:39 2010 +0000
+++ b/packages/hal/cortexm/arch/current/src/hal_misc.c	Tue May 04 13:18:19 2010 +0100
@@ -185,7 +185,7 @@
 
     hal_vsr_table[CYGNUM_HAL_VECTOR_SERVICE] = (CYG_ADDRESS)hal_switch_state_vsr;    
 
-    __asm__ volatile( "swi" );
+    __asm__ volatile( "swi 0" );
 
     hal_vsr_table[CYGNUM_HAL_VECTOR_SERVICE] = (CYG_ADDRESS)hal_default_svc_vsr;
     
diff -r 9b59569aaea9 -r d31e3aac03a6 packages/hal/cortexm/arch/current/src/vectors.S
--- a/packages/hal/cortexm/arch/current/src/vectors.S	Fri Apr 23 12:01:39 2010 +0000
+++ b/packages/hal/cortexm/arch/current/src/vectors.S	Tue May 04 13:18:19 2010 +0100
@@ -130,7 +130,8 @@
         msr     control,r0
         isb                             // Insert a barrier
         
-        msr     psp,sp                  // Copy SP to PSP
+        mov     r0,sp
+        msr     psp,r0                  // Copy SP to PSP
 
 #if !defined(CYGPKG_KERNEL)
         sub     sp,#(CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE/2)
@@ -274,7 +275,7 @@
 hal_interrupt_end_done:
 
         ldr     r3,=hal_interrupt_end_vsr
-        swi
+        swi 0
         
 //==========================================================================        
 // Interrupt end VSR

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] when building using binutils 2.20:
  2010-05-04 12:27 [PATCH] when building using binutils 2.20: Spencer Oliver
@ 2010-05-12 13:12 ` Jonathan Larmour
  2010-05-17  7:23   ` Daniel Néri
  2010-05-17  9:36   ` Spencer Oliver
  2010-05-17 11:40 ` Nick Garnett
  1 sibling, 2 replies; 5+ messages in thread
From: Jonathan Larmour @ 2010-05-12 13:12 UTC (permalink / raw)
  To: Spencer Oliver; +Cc: ecos-patches

Spencer Oliver wrote:
> cortex_m3: buildfix for binutils 2.20
> 
> when building using binutils 2.20:
>  - swi inst now requires an argument.
>  - msr psp,sp is not allowed.

I'll let Nick handle this patch, but I'm curious (and admittedly haven't 
looked at the ISA details): it seems strange that msr psp,sp used to be 
allowed but now is not - and presumably it worked on the hardware 
otherwise it wouldn't have been in the port.

Jifl

> ------------------------------------------------------------------------
> 
> # HG changeset patch
> # User Spencer Oliver <spen@spen-soft.co.uk>
> # Date 1272975499 -3600
> # Node ID d31e3aac03a66dd841d6b9a48c1261c00b437475
> # Parent  9b59569aaea99c165f8b838325d2f6bd4951ab36
> cortex_m3: buildfix for binutils 2.20
> 
> when building using binutils 2.20:
>  - swi inst now requires an argument.
>  - msr psp,sp is not allowed.
> 
> diff -r 9b59569aaea9 -r d31e3aac03a6 packages/hal/cortexm/arch/current/include/hal_intr.h
> --- a/packages/hal/cortexm/arch/current/include/hal_intr.h	Fri Apr 23 12:01:39 2010 +0000
> +++ b/packages/hal/cortexm/arch/current/include/hal_intr.h	Tue May 04 13:18:19 2010 +0100
> @@ -298,7 +298,7 @@
>  {                                                       \
>      __asm__ volatile (                                  \
>          "ldr     r3,=hal_call_dsrs_vsr          \n"     \
> -        "swi                                    \n"     \
> +        "swi 0                                  \n"     \
>          :                                               \
>          :                                               \
>          : "r3"                                          \
> diff -r 9b59569aaea9 -r d31e3aac03a6 packages/hal/cortexm/arch/current/src/hal_misc.c
> --- a/packages/hal/cortexm/arch/current/src/hal_misc.c	Fri Apr 23 12:01:39 2010 +0000
> +++ b/packages/hal/cortexm/arch/current/src/hal_misc.c	Tue May 04 13:18:19 2010 +0100
> @@ -185,7 +185,7 @@
>  
>      hal_vsr_table[CYGNUM_HAL_VECTOR_SERVICE] = (CYG_ADDRESS)hal_switch_state_vsr;    
>  
> -    __asm__ volatile( "swi" );
> +    __asm__ volatile( "swi 0" );
>  
>      hal_vsr_table[CYGNUM_HAL_VECTOR_SERVICE] = (CYG_ADDRESS)hal_default_svc_vsr;
>      
> diff -r 9b59569aaea9 -r d31e3aac03a6 packages/hal/cortexm/arch/current/src/vectors.S
> --- a/packages/hal/cortexm/arch/current/src/vectors.S	Fri Apr 23 12:01:39 2010 +0000
> +++ b/packages/hal/cortexm/arch/current/src/vectors.S	Tue May 04 13:18:19 2010 +0100
> @@ -130,7 +130,8 @@
>          msr     control,r0
>          isb                             // Insert a barrier
>          
> -        msr     psp,sp                  // Copy SP to PSP
> +        mov     r0,sp
> +        msr     psp,r0                  // Copy SP to PSP
>  
>  #if !defined(CYGPKG_KERNEL)
>          sub     sp,#(CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE/2)
> @@ -274,7 +275,7 @@
>  hal_interrupt_end_done:
>  
>          ldr     r3,=hal_interrupt_end_vsr
> -        swi
> +        swi 0
>          
>  //==========================================================================        
>  // Interrupt end VSR


-- 
------["The best things in life aren't things."]------      Opinions==mine

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] when building using binutils 2.20:
  2010-05-12 13:12 ` Jonathan Larmour
@ 2010-05-17  7:23   ` Daniel Néri
  2010-05-17  9:36   ` Spencer Oliver
  1 sibling, 0 replies; 5+ messages in thread
From: Daniel Néri @ 2010-05-17  7:23 UTC (permalink / raw)
  To: ecos-patches

Jonathan Larmour <jifl@jifvik.org> writes:

> I'll let Nick handle this patch, but I'm curious (and admittedly
> haven't looked at the ISA details): it seems strange that msr psp,sp
> used to be allowed but now is not - and presumably it worked on the
> hardware otherwise it wouldn't have been in the port.

Over the weekend I tried to build a new ARM toolchain with binutils
2.20.1 and GCC 4.3.4, and it failed on code generated for ARMv7 by GCC
itself, with GAS complaining about the use of R13. Downgrading to
binutils 2.19.1 helped.

Regards,
Daniel

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] when building using binutils 2.20:
  2010-05-12 13:12 ` Jonathan Larmour
  2010-05-17  7:23   ` Daniel Néri
@ 2010-05-17  9:36   ` Spencer Oliver
  1 sibling, 0 replies; 5+ messages in thread
From: Spencer Oliver @ 2010-05-17  9:36 UTC (permalink / raw)
  To: Jonathan Larmour; +Cc: ecos-patches

On 12/05/2010 14:12, Jonathan Larmour wrote:
> Spencer Oliver wrote:
>> cortex_m3: buildfix for binutils 2.20
>>
>> when building using binutils 2.20:
>> - swi inst now requires an argument.
>> - msr psp,sp is not allowed.
>
> I'll let Nick handle this patch, but I'm curious (and admittedly haven't
> looked at the ISA details): it seems strange that msr psp,sp used to be
> allowed but now is not - and presumably it worked on the hardware
> otherwise it wouldn't have been in the port.
>

msr psp,sp used to be allowed, but the armv7m trm states it as undefined 
behaviour - this seems to match what realview does.

Cheers
Spen

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] when building using binutils 2.20:
  2010-05-04 12:27 [PATCH] when building using binutils 2.20: Spencer Oliver
  2010-05-12 13:12 ` Jonathan Larmour
@ 2010-05-17 11:40 ` Nick Garnett
  1 sibling, 0 replies; 5+ messages in thread
From: Nick Garnett @ 2010-05-17 11:40 UTC (permalink / raw)
  To: Spencer Oliver; +Cc: ecos-patches

Spencer Oliver <spen@spen-soft.co.uk> writes:

> cortex_m3: buildfix for binutils 2.20
> 
> when building using binutils 2.20:
>   - swi inst now requires an argument.
>   - msr psp,sp is not allowed.

I've written a ChangeLog entry for you. The following patch has been
applied:

Index: ChangeLog
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/cortexm/arch/current/ChangeLog,v
retrieving revision 1.10
diff -u -5 -r1.10 ChangeLog
--- ChangeLog	4 Mar 2009 16:29:55 -0000	1.10
+++ ChangeLog	17 May 2010 11:36:08 -0000
@@ -1,5 +1,14 @@
+2010-05-17  Spencer Oliver <spen@spen-soft.co.uk>
+
+	* include/hal_intr.h (HAL_INTERRUPT_STACK_CALL_PENDING_DSRS):
+	* src/hal_misc.c (hal_reset_vsr): Add 0 argument to SWI.
+
+	* src/vectors.S (hal_switch_state_vsr): Eliminate "msr psp,sp",
+	which is now deprecated.
+	(hal_pendable_svc_vsr): Add 0 argument to SWI.
+
 2009-02-27  Simon Kallweit  <simon.kallweit@intefo.ch>
 
 	* include/hal_io.h: Added system control register definitions 
 
 2009-02-13  Nick Garnett  <nickg@ecoscentric.com>
Index: include/hal_intr.h
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/cortexm/arch/current/include/hal_intr.h,v
retrieving revision 1.4
diff -u -5 -r1.4 hal_intr.h
--- include/hal_intr.h	29 Jan 2009 17:49:15 -0000	1.4
+++ include/hal_intr.h	17 May 2010 11:36:09 -0000
@@ -296,11 +296,11 @@
 __externC void hal_call_dsrs_vsr(void);
 #define HAL_INTERRUPT_STACK_CALL_PENDING_DSRS()         \
 {                                                       \
     __asm__ volatile (                                  \
         "ldr     r3,=hal_call_dsrs_vsr          \n"     \
-        "swi                                    \n"     \
+        "swi 0                                  \n"     \
         :                                               \
         :                                               \
         : "r3"                                          \
         );                                              \
 }
Index: src/hal_misc.c
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/cortexm/arch/current/src/hal_misc.c,v
retrieving revision 1.5
diff -u -5 -r1.5 hal_misc.c
--- src/hal_misc.c	9 Feb 2009 15:57:49 -0000	1.5
+++ src/hal_misc.c	17 May 2010 11:36:09 -0000
@@ -183,11 +183,11 @@
     // We don't need to do this for RAM startup since the ROM code
     // will have already done it.
 
     hal_vsr_table[CYGNUM_HAL_VECTOR_SERVICE] = (CYG_ADDRESS)hal_switch_state_vsr;    
 
-    __asm__ volatile( "swi" );
+    __asm__ volatile( "swi 0" );
 
     hal_vsr_table[CYGNUM_HAL_VECTOR_SERVICE] = (CYG_ADDRESS)hal_default_svc_vsr;
     
 #endif // !defined(CYG_HAL_STARTUP_RAM)
     
Index: src/vectors.S
===================================================================
RCS file: /cvs/ecos/ecos/packages/hal/cortexm/arch/current/src/vectors.S,v
retrieving revision 1.2
diff -u -5 -r1.2 vectors.S
--- src/vectors.S	29 Jan 2009 17:49:15 -0000	1.2
+++ src/vectors.S	17 May 2010 11:36:09 -0000
@@ -128,11 +128,12 @@
         
         mov     r0,#2                   // Set CONTROL register to 2
         msr     control,r0
         isb                             // Insert a barrier
         
-        msr     psp,sp                  // Copy SP to PSP
+        mov     r0,sp
+        msr     psp,r0                  // Copy SP to PSP
 
 #if !defined(CYGPKG_KERNEL)
         sub     sp,#(CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE/2)
 #endif        
         
@@ -272,11 +273,11 @@
         .thumb_func
         .type   hal_interrupt_end_done, %function
 hal_interrupt_end_done:
 
         ldr     r3,=hal_interrupt_end_vsr
-        swi
+        swi 0
         
 //==========================================================================        
 // Interrupt end VSR
 //
 // This is the SVC VSR invoked by hal_interrupt_end_done to restore the



-- 
Nick Garnett                                      eCos Kernel Architect
eCosCentric Limited    http://www.eCosCentric.com      The eCos experts
Barnwell House, Barnwell Drive, Cambridge, UK.     Tel: +44 1223 245571
Registered in England and Wales:                        Reg No: 4422071

^ permalink raw reply	[flat|nested] 5+ messages in thread

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2010-05-04 12:27 [PATCH] when building using binutils 2.20: Spencer Oliver
2010-05-12 13:12 ` Jonathan Larmour
2010-05-17  7:23   ` Daniel Néri
2010-05-17  9:36   ` Spencer Oliver
2010-05-17 11:40 ` Nick Garnett

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