From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7836 invoked by alias); 23 Apr 2012 15:09:38 -0000 Received: (qmail 7825 invoked by uid 22791); 23 Apr 2012 15:09:37 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL,BAYES_00,SUBJ_OBFU_PUNCT_FEW,SUBJ_OBFU_PUNCT_MANY X-Spam-Check-By: sourceware.org Received: from hagrid.ecoscentric.com (HELO mail.ecoscentric.com) (212.13.207.197) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 23 Apr 2012 15:09:24 +0000 Received: from localhost (hagrid.ecoscentric.com [127.0.0.1]) by mail.ecoscentric.com (Postfix) with ESMTP id 39CFA2F78011 for ; Mon, 23 Apr 2012 16:09:23 +0100 (BST) Received: from mail.ecoscentric.com ([127.0.0.1]) by localhost (hagrid.ecoscentric.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id pd9A7GUfvGBe; Mon, 23 Apr 2012 16:09:22 +0100 (BST) From: bugzilla-daemon@bugs.ecos.sourceware.org To: ecos-patches@ecos.sourceware.org Subject: [Bug 1001571] New: Make CYGHWR_HAL_STM32_PIN_IN consistent on STM32 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: eCos X-Bugzilla-Component: Patches and contributions X-Bugzilla-Keywords: X-Bugzilla-Severity: minor X-Bugzilla-Who: jifl@ecoscentric.com X-Bugzilla-Status: NEW X-Bugzilla-Priority: low X-Bugzilla-Assigned-To: jifl@ecoscentric.com X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: X-Bugzilla-URL: http://bugs.ecos.sourceware.org/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Date: Mon, 23 Apr 2012 15:09:00 -0000 Mailing-List: contact ecos-patches-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: ecos-patches-owner@ecos.sourceware.org X-SW-Source: 2012-04/txt/msg00055.txt.bz2 Please do not reply to this email. Use the web interface provided at: http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001571 Summary: Make CYGHWR_HAL_STM32_PIN_IN consistent on STM32 Product: eCos Version: CVS Platform: stm32e_eval (ST STM3210E EVAL board) OS/Version: Cortex-M Status: NEW Severity: minor Priority: low Component: Patches and contributions AssignedTo: jifl@ecoscentric.com ReportedBy: jifl@ecoscentric.com CC: ecos-patches@ecos.sourceware.org, jerzdy@gmail.com Class: Advice Request We just discovered a little issue with the definition of CYGHWR_HAL_STM32_PIN_IN. It's internally consistent (so people may not have noticed any problem for a long time), but the F1 and F2 versions of this macro were not consistent with each other, which defeats the goal of keeping them consistent. This patch addresses that. I'm committing it. Jerzy, you may want to take note in case it affects you. In our own plf_io.h for an STM3210c board with ethernet, we made this change: -#define CYGHWR_HAL_STM32_ETH_MII_RX_DV CYGHWR_HAL_STM32_PIN_IN( D, 8, NA , FLOATING ) -#define CYGHWR_HAL_STM32_ETH_MII_RXD0 CYGHWR_HAL_STM32_PIN_IN( D, 9, NA , FLOATING ) -#define CYGHWR_HAL_STM32_ETH_MII_RXD1 CYGHWR_HAL_STM32_PIN_IN( D, 10, NA , FLOATING ) -#define CYGHWR_HAL_STM32_ETH_MII_RXD2 CYGHWR_HAL_STM32_PIN_IN( D, 11, NA , FLOATING ) -#define CYGHWR_HAL_STM32_ETH_MII_RXD3 CYGHWR_HAL_STM32_PIN_IN( D, 12, NA , FLOATING ) +#define CYGHWR_HAL_STM32_ETH_MII_RX_DV CYGHWR_HAL_STM32_PIN_IN( D, 8, FLOATING ) +#define CYGHWR_HAL_STM32_ETH_MII_RXD0 CYGHWR_HAL_STM32_PIN_IN( D, 9, FLOATING ) +#define CYGHWR_HAL_STM32_ETH_MII_RXD1 CYGHWR_HAL_STM32_PIN_IN( D, 10, FLOATING ) +#define CYGHWR_HAL_STM32_ETH_MII_RXD2 CYGHWR_HAL_STM32_PIN_IN( D, 11, FLOATING ) +#define CYGHWR_HAL_STM32_ETH_MII_RXD3 CYGHWR_HAL_STM32_PIN_IN( D, 12, FLOATING ) Again, if you prefer to replace the defines in var_io_eth.h with your own, do; don't feel compelled to use ours if you don't want to. Jifl -- Configure bugmail: http://bugs.ecos.sourceware.org/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are on the CC list for the bug.