From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7198 invoked by alias); 8 Mar 2013 15:09:01 -0000 Received: (qmail 7186 invoked by uid 22791); 8 Mar 2013 15:08:59 -0000 X-SWARE-Spam-Status: No, hits=-2.7 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from hagrid.ecoscentric.com (HELO mail.ecoscentric.com) (212.13.207.197) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 08 Mar 2013 15:08:27 +0000 Received: from localhost (hagrid.ecoscentric.com [127.0.0.1]) by mail.ecoscentric.com (Postfix) with ESMTP id 48E964680012 for ; Fri, 8 Mar 2013 15:08:26 +0000 (GMT) Received: from mail.ecoscentric.com ([127.0.0.1]) by localhost (hagrid.ecoscentric.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vs9hUHlvIzEx; Fri, 8 Mar 2013 15:08:21 +0000 (GMT) From: bugzilla-daemon@bugs.ecos.sourceware.org To: ecos-patches@ecos.sourceware.org Subject: [Bug 1001607] Cortex-M4F architectural Floating Point Support Date: Fri, 08 Mar 2013 15:09:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: eCos X-Bugzilla-Component: Patches and contributions X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: jifl@ecoscentric.com X-Bugzilla-Status: NEEDINFO X-Bugzilla-Priority: low X-Bugzilla-Assigned-To: jifl@ecoscentric.com X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://bugs.ecos.sourceware.org/ Auto-Submitted: auto-generated MIME-Version: 1.0 Mailing-List: contact ecos-patches-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: ecos-patches-owner@ecos.sourceware.org X-SW-Source: 2013-03/txt/msg00018.txt.bz2 Please do not reply to this email, use the link below. http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001607 --- Comment #63 from Jonathan Larmour --- The only things I've seen is: - you need to align the thread stacks in fpint_thread_switch.cxx with CYGBLD_ATTRIB_ALIGN_MAX - The changelogs for the twr_k70f120m and kinetis variant HALs don't quite cover all the changes made But that's it! (In reply to comment #62) > > I think that for interrupts it would be a waste. > However this led me to idea to add check ASPEN bit of FPCCR to the > GDB_STUB_SAVEDREG_FPU_EXCEPTION_SET() so now RedBoot can determine if > autosave is enabled or disabled in runtime. Single RedBoot image to debug > LAZY, ALL and NONE. Implemented. Good catch, I'd missed that that would have been a problem, so fixing it is even better :). > There's no problem with using DSP instructions. CDL will allow you to set > -mcpu=cortex-m4 either manually or provide as default setting by platform Ah, I'd missed that subtlety in the CDL. The M3 flag is excluded on the basis of FPU support, the M4 flag is excluded on the basis of CYGHWR_HAL_CORTEXM. Yes, that's definitely fine then. > > Also of course as mentioned above, we still need to work out the last few > > niggles with those kernel tests. > > I hope the tests are clean now. Some of the "features" were inherited from > original files. My next window for check-in is the upcoming weekend. I think with the above few changes (stack alignment and changelogs), which are too minor to re-post here, you can put it all in. Thanks for all this really good work! It's taken quite a while, but I think what we now have is a lot better as a result. Jifl -- You are receiving this mail because: You are on the CC list for the bug.