From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11505 invoked by alias); 7 Feb 2013 09:47:13 -0000 Received: (qmail 11483 invoked by uid 22791); 7 Feb 2013 09:47:12 -0000 X-SWARE-Spam-Status: No, hits=-2.7 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from hagrid.ecoscentric.com (HELO mail.ecoscentric.com) (212.13.207.197) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 07 Feb 2013 09:47:05 +0000 Received: from localhost (hagrid.ecoscentric.com [127.0.0.1]) by mail.ecoscentric.com (Postfix) with ESMTP id 27DD94680012 for ; Thu, 7 Feb 2013 09:47:04 +0000 (GMT) Received: from mail.ecoscentric.com ([127.0.0.1]) by localhost (hagrid.ecoscentric.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id iLe+tK+Spgy5; Thu, 7 Feb 2013 09:47:00 +0000 (GMT) From: bugzilla-daemon@bugs.ecos.sourceware.org To: ecos-patches@ecos.sourceware.org Subject: [Bug 1001607] Cortex-M4F architectural Floating Point Support Date: Thu, 07 Feb 2013 09:47:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: eCos X-Bugzilla-Component: Patches and contributions X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: ilijak@siva.com.mk X-Bugzilla-Status: NEEDINFO X-Bugzilla-Priority: low X-Bugzilla-Assigned-To: jifl@ecoscentric.com X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: rep_platform Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://bugs.ecos.sourceware.org/ Auto-Submitted: auto-generated MIME-Version: 1.0 Mailing-List: contact ecos-patches-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: ecos-patches-owner@ecos.sourceware.org X-SW-Source: 2013-02/txt/msg00014.txt.bz2 Please do not reply to this email, use the link below. http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001607 Ilija Kocho changed: What |Removed |Added ---------------------------------------------------------------------------- Target|stm3240g_eval (ST |All |STM3240G-EVAL board) | --- Comment #49 from Ilija Kocho --- (In reply to comment #41) > But I wonder if we've been missing something here. According to > http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0298a/ > DAFGGBJD.html the Cortex-M can itself support lazy stacking, and you do > enable the relevant FPCCR bits in hal_init_fpu(). This means that the > processor will lazily save s0-s15 only if needed. We also don't need to > worry about s16-s31 as the procedure call standard means that they will > automatically be saved/restored by the compiler if it generates code which > uses them. This should mean that there is no penalty (except memory) of > allowing FPU access in interrupt/exception handlers. > > I believe the only time we do need to save s16-31 is if this is a ROM > monitor or includes a GDB stub, i.e. if CYGSEM_HAL_DEBUG_FPU is defined > (after the fix we already talked about). > > If you agree with my assessment (I may have missed something!), then I would > even go as far as saying that we could get rid of the _EXC_AUTOSAVE option, > because there probably isn't a reason to do anything else - i.e. we can > effectively have it permanently on. Jifl I missundersood you, lazy thinking :(. You are right, "ALL", as is, engages Lazy Stacking indeed so we can drop the CYGARC_CORTEXM_FPU_EXC_AUTOSAVE option. I am going to submit updated patch later today. Ilija -- You are receiving this mail because: You are on the CC list for the bug.