From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1424 invoked by alias); 7 Mar 2013 01:46:54 -0000 Received: (qmail 1412 invoked by uid 22791); 7 Mar 2013 01:46:53 -0000 X-SWARE-Spam-Status: No, hits=-2.7 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,KHOP_THREADED,RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from hagrid.ecoscentric.com (HELO mail.ecoscentric.com) (212.13.207.197) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 07 Mar 2013 01:46:48 +0000 Received: from localhost (hagrid.ecoscentric.com [127.0.0.1]) by mail.ecoscentric.com (Postfix) with ESMTP id 2C498468000A for ; Thu, 7 Mar 2013 01:46:47 +0000 (GMT) Received: from mail.ecoscentric.com ([127.0.0.1]) by localhost (hagrid.ecoscentric.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id sKghdDvT05Di; Thu, 7 Mar 2013 01:46:44 +0000 (GMT) From: bugzilla-daemon@bugs.ecos.sourceware.org To: ecos-patches@ecos.sourceware.org Subject: [Bug 1001607] Cortex-M4F architectural Floating Point Support Date: Thu, 07 Mar 2013 01:46:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: eCos X-Bugzilla-Component: Patches and contributions X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: ilijak@siva.com.mk X-Bugzilla-Status: NEEDINFO X-Bugzilla-Priority: low X-Bugzilla-Assigned-To: jifl@ecoscentric.com X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://bugs.ecos.sourceware.org/ Auto-Submitted: auto-generated MIME-Version: 1.0 Mailing-List: contact ecos-patches-help@ecos.sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: ecos-patches-owner@ecos.sourceware.org X-SW-Source: 2013-03/txt/msg00017.txt.bz2 Please do not reply to this email, use the link below. http://bugs.ecos.sourceware.org/show_bug.cgi?id=1001607 --- Comment #62 from Ilija Kocho --- Hi Jifl (In reply to comment #57) [snip] I applied CYGTST_KERNEL_SKIP_MULTI_THREAD_FP_TEST and performed fixes to the tests. In addition I renamed thread_switch_fpu.cxx to fpint_thread_switch.cxx - sounds better to me and now all tests have same prefix. > > > (In reply to comment #50) [snip] > > Provided that that LAZY uses FPU enabled/disbled state in order to > > distinguish between _FP_ and _INT_ threads, suppose that _INT_ thread is > > interrupted by _FP_ ISR. Then Usage Fault VSR will enable FPU and FPU will > > remain enabled after ISR returns [in thread context], effectively converting > > the tread to _FP_. Gradually, this ISR "_FP_ missioner" ISR may convert all > > threads to _FP_ so we're not lazy any more. > > Yes you're right of course. But I can't help feel it wouldn't be difficult > to fix this in the exception and interrupt vsrs - e.g. set > HAL_SAVEDREGISTERS_WITH_FPU as the saved register type if the FPU enabled > bit is set in FPU_CPACR on entry to the exception or interrupt VSR, and then > ensure the FPU is enabled/disabled accordingly before exit. I just get the > feeling this should be able to be solved with little overhead. I think that for interrupts it would be a waste. However this led me to idea to add check ASPEN bit of FPCCR to the GDB_STUB_SAVEDREG_FPU_EXCEPTION_SET() so now RedBoot can determine if autosave is enabled or disabled in runtime. Single RedBoot image to debug LAZY, ALL and NONE. Implemented. [snip] > > Yes! In fact I have no problems with the FP patch 130210 and as far as I'm > concerned that patch can be committed. However I do have an issue with your > changes for the code build flag which you added in comment #56, which is > that this will also prevent use of the DSP instructions by GCC I believe? There's no problem with using DSP instructions. CDL will allow you to set -mcpu=cortex-m4 either manually or provide as default setting by platform (we can do it when we adopt new compiler). As a side effect you can set cortex-m4 alone by sequence of enable/disable FPU. > > Also of course as mentioned above, we still need to work out the last few > niggles with those kernel tests. I hope the tests are clean now. Some of the "features" were inherited from original files. My next window for check-in is the upcoming weekend. Ilija -- You are receiving this mail because: You are on the CC list for the bug.