From: Edgar Grimberg <edgar.grimberg@zylin.com>
To: Nick Garnett <nickg@ecoscentric.com>
Cc: ecos-patches@ecos.sourceware.org
Subject: Re: IO FLASH and caches
Date: Fri, 16 Oct 2009 12:30:00 -0000 [thread overview]
Message-ID: <d0f570ed0910160530u4d0400dbh6a15fab32609cc82@mail.gmail.com> (raw)
In-Reply-To: <m3r5t34n2u.fsf@xl5.calivar.com>
Hi Nick,
Thanks for the feedback.
On Fri, Oct 16, 2009 at 1:04 PM, Nick Garnett <nickg@ecoscentric.com> wrote:
> Edgar Grimberg <edgar.grimberg@zylin.com> writes:
>
>> Hi,
>>
>> The attached patch handles the case where the CPU cannot disable
>> caches and needs to provide an uncached address instead. The fix was
>> tested with a NIOS2 CPU.
>
> I don't think this patch is correct. In general flash should be read
> through the cache. Flash devices are slow and using the cache improves
> performance. It is the responsibility of the flash driver to ensure
> that stale data is evicted from the caches by calling cache control
> macros. In general the drivers already do this.
>
> This patch forces uncached access for any architecture that defines
> CYGARC_UNCACHED_ADDRESS(). Many platforms (e.g. MIPS, PPC, ARM9)
> provide both cached and uncached views of memory. These architectures
> also provide mechanisms for flushing and invalidating the caches.
The only place where the uncached address is used is inside the area guarded by:
HAL_FLASH_CACHES_OFF(d_cache, i_cache);
...
HAL_FLASH_CACHES_ON(d_cache, i_cache);
So the patch is not supposed to modify the intended access type.
>
> As far as I am aware, the NIOS2 has cache control instructions, so I
> am not sure what the actual reason for this patch is.
NIOS2 cannot just turn the caches off. The only way to say that a
memory range should not be accessed via caches is to set the MSB bit
of the address to 1.
> In any case, I don't think that other architectures should be forced
> to operate at lower performance just to accommodate the shortcomings
> of one particular architecture.
Agree. I'm not sure that's the case, though.
Regards,
Edgar
>
> --
> Nick Garnett eCos Kernel Architect
> eCosCentric Limited http://www.eCosCentric.com The eCos experts
> Barnwell House, Barnwell Drive, Cambridge, UK. Tel: +44 1223 245571
> Registered in England and Wales: Reg No: 4422071
>
>
--
Edgar Grimberg
System Developer
Zylin AS
ZY1000 JTAG Debugger http://www.zylin.com/zy1000.html
Phone: (+47) 51 63 25 00
next prev parent reply other threads:[~2009-10-16 12:30 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-10-16 7:41 Edgar Grimberg
2009-10-16 11:04 ` Nick Garnett
2009-10-16 12:30 ` Edgar Grimberg [this message]
2009-10-16 12:58 ` Nick Garnett
2009-10-16 13:23 ` Edgar Grimberg
2009-10-16 13:15 ` Bart Veer
2009-10-16 13:37 ` Edgar Grimberg
2009-10-16 14:41 ` Bart Veer
2009-10-16 14:57 ` Edgar Grimberg
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