[SCM] master: Merge branch 'master' of ssh://sources.redhat.com/git/frysk

[jflavio@sourceware.org]

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       via  26494adb8e756245aebbb591ad28aba39375aa58 (commit)
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- Log -----------------------------------------------------------------
commit 3d96853b2e7b6935288fc4881f2a9230bc743506
Merge: 26494adb8e756245aebbb591ad28aba39375aa58 bddcc9f83077db2a97348cb8689975794c819d55
Author: Jose Flavio Aguilar Paulino <jflavio@bart.ltc.br.ibm.com>
Date:   Sat Nov 10 12:47:16 2007 -0200

    Merge branch 'master' of ssh://sources.redhat.com/git/frysk

commit 26494adb8e756245aebbb591ad28aba39375aa58
Author: Jose Flavio Aguilar Paulino <jflavio@bart.ltc.br.ibm.com>
Date:   Sat Nov 10 02:06:29 2007 -0200

    Fix for Power64 (isa registers and groups)

-----------------------------------------------------------------------

Summary of changes:
 frysk-core/frysk/isa/ChangeLog           |    3 +
 frysk-core/frysk/isa/PPC64Registers.java |   91 ++++++++++++++++++++++++++++--
 2 files changed, 88 insertions(+), 6 deletions(-)

First 500 lines of diff:
diff --git a/frysk-core/frysk/isa/ChangeLog b/frysk-core/frysk/isa/ChangeLog
index 671c4d2..195f4bc 100644
--- a/frysk-core/frysk/isa/ChangeLog
+++ b/frysk-core/frysk/isa/ChangeLog
@@ -1,3 +1,6 @@
+2007-11-10  Jose Flavio Aguilar Paulino <jflavio@br.ibm.com>
+        * PPC64Registers.java: Fixing Power64 registers and groups.
+
 2007-11-09  Jose Flavio Aguilar Paulino <jflavio@br.ibm.com>
         * Fixing Power32 ISA. Patching the registers and creating 
 	register group
diff --git a/frysk-core/frysk/isa/PPC64Registers.java b/frysk-core/frysk/isa/PPC64Registers.java
index 611f16d..f93fcb1 100644
--- a/frysk-core/frysk/isa/PPC64Registers.java
+++ b/frysk-core/frysk/isa/PPC64Registers.java
@@ -173,9 +173,88 @@ public class PPC64Registers extends Registers {
     public static final Register FPR31
 	= new Register("fpr31", StandardTypes.FLOAT64B_T);
 
+    /* Special Registers */
+    public static final Register LR
+	= new Register("lr", StandardTypes.VOIDPTR64B_T);
+    public static final Register CTR
+	= new Register("ctr", StandardTypes.INT64B_T);
+    public static final Register ARG
+	= new Register("arg", StandardTypes.INT64B_T);
+    public static final Register CR
+	= new Register("cr", StandardTypes.INT64B_T);
+    public static final Register XER
+	= new Register("xer", StandardTypes.INT64B_T);
+
+    /* Alti-vec special register */
+    public static final Register VRSAVE
+	= new Register("vrsave", StandardTypes.INT64B_T);
+    public static final Register VSCR
+	= new Register("vscr", StandardTypes.INT64B_T);
+
+    /* SPUs special registers (for CELL processors) */
+    public static final Register SPEACC
+	= new Register("speacc", StandardTypes.INT64B_T);
+    public static final Register SPEFSCR
+	= new Register("spefscr", StandardTypes.INT64B_T);
+
+    /* Frame-Pointer */
+    public static final Register FRP
+	= new Register("frp", StandardTypes.VOIDPTR64B_T);
+
+    /* Next-Instruction Pointer (Program Pointer) */
     public static final Register NIP
 	= new Register("nip", StandardTypes.VOIDPTR64B_T);
 
+    /* 
+     * Defining Register Groups
+     */
+    public static final RegisterGroup GENERAL
+        = new RegisterGroup("general",
+                  new Register[] {
+                          GPR0 , GPR1 , GPR2 , GPR3 , GPR4 , GPR5 , GPR6 , GPR7 , GPR8 , GPR9 ,
+                          GPR10, GPR11, GPR12, GPR13, GPR14, GPR15, GPR16, GPR17, GPR18, GPR19,
+                          GPR20, GPR21, GPR22, GPR23, GPR24, GPR25, GPR26, GPR27, GPR28, GPR29,
+                          GPR30, GPR31 });
+
+    public static final RegisterGroup SPECIAL
+        = new RegisterGroup("special",
+                  new Register[] { LR, CTR, ARG, CR, XER, 
+                                   VRSAVE, VSCR, SPEACC, SPEFSCR, 
+                                   FRP, NIP });
+
+    public static final RegisterGroup FLOATING_POINTER
+        = new RegisterGroup("floatingpointer",
+                  new Register[] {
+                          FPR0 , FPR1 , FPR2 , FPR3 , FPR4 , FPR5 , FPR6 , FPR7 , FPR8 , FPR9 ,
+                          FPR10, FPR11, FPR12, FPR13, FPR14, FPR15, FPR16, FPR17, FPR18, FPR19,
+                          FPR20, FPR21, FPR22, FPR23, FPR24, FPR25, FPR26, FPR27, FPR28, FPR29,
+                          FPR30, FPR31 });
+
+    /*
+     * Creating the special ALL group
+     */
+    public static final RegisterGroup ALL;
+    static {
+        Register[] allRegs = new Register[
+                GENERAL.getRegisters().length +
+                SPECIAL.getRegisters().length +
+                FLOATING_POINTER.getRegisters().length];
+
+        System.arraycopy(GENERAL.getRegisters(), 0,
+                         allRegs, 0,
+                         GENERAL.getRegisters().length);
+
+        System.arraycopy(SPECIAL.getRegisters(), 0,
+                         allRegs, GENERAL.getRegisters().length,
+                         SPECIAL.getRegisters().length);
+
+        System.arraycopy(FLOATING_POINTER.getRegisters(), 0,
+                         allRegs, GENERAL.getRegisters().length + SPECIAL.getRegisters().length,
+                         FLOATING_POINTER.getRegisters().length);
+
+        ALL = new RegisterGroup("all", allRegs);
+    }
+
     public Register getProgramCounter() {
 	return NIP;
     }
@@ -185,17 +264,17 @@ public class PPC64Registers extends Registers {
     }
 
     public RegisterGroup getDefaultRegisterGroup() {
-	// FIXME!
-	return null;
+	return GENERAL;
     }
 
     public RegisterGroup getAllRegistersGroup() {
-	// FIXME!
-	return null;
+	return ALL;
     }
 
+    /* 
+     * Default Constructor
+     */
     PPC64Registers() {
-	// FIXME!
-	super(null);
+	super(new RegisterGroup[] { GENERAL, SPECIAL, FLOATING_POINTER, ALL });
     }
 }


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