From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26745 invoked by alias); 3 Dec 2007 23:16:37 -0000 Received: (qmail 26720 invoked by uid 367); 3 Dec 2007 23:16:37 -0000 Date: Mon, 03 Dec 2007 23:16:00 -0000 Message-ID: <20071203231637.26705.qmail@sourceware.org> From: cagney@sourceware.org To: frysk-cvs@sourceware.org Subject: [SCM] master: Enable live floating-point register tests. X-Git-Refname: refs/heads/master X-Git-Reftype: branch X-Git-Oldrev: 12a00e7ea3e7a513e2934c942e56ec4d61d15830 X-Git-Newrev: 839772cd0edce393775a7a622599f3bb4a52ed42 Mailing-List: contact frysk-cvs-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Post: List-Help: , Sender: frysk-cvs-owner@sourceware.org Reply-To: frysk@sourceware.org X-SW-Source: 2007-q4/txt/msg00515.txt.bz2 The branch, master has been updated via 839772cd0edce393775a7a622599f3bb4a52ed42 (commit) from 12a00e7ea3e7a513e2934c942e56ec4d61d15830 (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email. - Log ----------------------------------------------------------------- commit 839772cd0edce393775a7a622599f3bb4a52ed42 Author: Andrew Cagney Date: Mon Dec 3 18:11:49 2007 -0500 Enable live floating-point register tests. frysk-core/frysk/pkglibdir/ChangeLog 2007-12-03 Andrew Cagney * funit-regs.S (fxregs) [__i386__ || __x86_64__]: Provide initial values for FSW, FTW, FOP, RIP, RDP, CS, DS, EIP, and DP. frysk-core/frysk/proc/live/ChangeLog 2007-12-03 Andrew Cagney * TestRegs.java (testFloatRegisters()): Delete. frysk-core/frysk/testbed/ChangeLog 2007-12-03 Andrew Cagney * RegsCase.java (IA32, X8664): Update X87's FSW, FOP, EIP, CS, DS, DP, RIP, and RDP. ----------------------------------------------------------------------- Summary of changes: frysk-core/frysk/pkglibdir/ChangeLog | 5 +++ frysk-core/frysk/pkglibdir/funit-regs.S | 38 +++++++++++++++++--------- frysk-core/frysk/proc/live/ChangeLog | 2 + frysk-core/frysk/proc/live/TestRegs.java | 10 ------- frysk-core/frysk/testbed/ChangeLog | 3 ++ frysk-core/frysk/testbed/RegsCase.java | 42 ++++++++++++++--------------- 6 files changed, 55 insertions(+), 45 deletions(-) First 500 lines of diff: diff --git a/frysk-core/frysk/pkglibdir/ChangeLog b/frysk-core/frysk/pkglibdir/ChangeLog index 6083017..e8b9b2d 100644 --- a/frysk-core/frysk/pkglibdir/ChangeLog +++ b/frysk-core/frysk/pkglibdir/ChangeLog @@ -1,3 +1,8 @@ +2007-12-03 Andrew Cagney + + * funit-regs.S (fxregs) [__i386__ || __x86_64__]: Provide initial + values for FSW, FTW, FOP, RIP, RDP, CS, DS, EIP, and DP. + 2007-12-03 Mark Wielaard * funit-stepping-asm.S: Add fifth function and _stepOverPrologue_ diff --git a/frysk-core/frysk/pkglibdir/funit-regs.S b/frysk-core/frysk/pkglibdir/funit-regs.S index 530016e..50749f6 100644 --- a/frysk-core/frysk/pkglibdir/funit-regs.S +++ b/frysk-core/frysk/pkglibdir/funit-regs.S @@ -51,6 +51,7 @@ // floating-point and vector registers mov $fxregs, %eax fxrstor (%eax) + fxsave (%eax) mov $0x7eb03efc, %eax mov $0x35a322a0, %ebx @@ -66,7 +67,7 @@ // floating-point and vector registers mov $fxregs, %rax - fxrstor (%rax) + rex64/fxrstor (%rax) mov $0x837bb4e2d8209ca3, %rax mov $0x16d196be91fb2b92, %rdx @@ -114,21 +115,32 @@ crash: .data .align 16 fxregs: - // FCW + // FCW 0x1e71 .byte 0x71, 0x1e - // FSW 0x47e4 - .byte 0, 0 // .byte 0xe4, 0x47 + // FSW 0xc7e4 + .byte 0xe4, 0xc7 // FTW 0xc9 - .byte 0 // .byte 0xc9 + .byte 0xc9 .fill 1, 1, 0 - // FOP 0x1e8f - .byte 0, 0 // .byte 0x8f, 0x1e - // RIP 0x99af236679d5eeff - .byte 0, 0, 0, 0 // .byte 0xff, 0xee, 0xd5, 0x79 - .byte 0, 0, 0, 0 // .byte 0x66, 0x23, 0xaf, 0x99 - // RDP 0x6988a565d0acd7b0 - .byte 0, 0, 0, 0 // .byte 0xb0, 0xd7, 0xac, 0xd0 - .byte 0, 0, 0, 0 // .byte 0x65, 0xa5, 0x88, 0x69 + // FOP 0x068f + .byte 0x8f, 0x06 +#if defined __i386__ + // EIP + .byte 0xff, 0xee, 0xd5, 0x79 + // can't reliably set CS on i386 + .byte 0, 0, 0, 0 + // DP + .byte 0xb0, 0xd7, 0xac, 0xd0 + // can't reliably set DS on i386 + .byte 0, 0, 0, 0 +#else + // RIP 0x0000236679d5eeff + .byte 0xff, 0xee, 0xd5, 0x79 + .byte 0x66, 0x23, 0x00, 0x00 + // RDP 0x00007565d0acd7b0 + .byte 0xb0, 0xd7, 0xac, 0xd0 + .byte 0x65, 0x75, 0x00, 0x00 +#endif // MXCSR .fill 4, 1, 0 // MXCSR_MASK diff --git a/frysk-core/frysk/proc/live/ChangeLog b/frysk-core/frysk/proc/live/ChangeLog index 33e24b8..cb7e428 100644 --- a/frysk-core/frysk/proc/live/ChangeLog +++ b/frysk-core/frysk/proc/live/ChangeLog @@ -1,5 +1,7 @@ 2007-12-03 Andrew Cagney + * TestRegs.java (testFloatRegisters()): Delete. + * TestRegs.java (testVectorRegisters()): Delete. 2007-11-29 Andrew Cagney diff --git a/frysk-core/frysk/proc/live/TestRegs.java b/frysk-core/frysk/proc/live/TestRegs.java index c22ea93..19cadfe 100644 --- a/frysk-core/frysk/proc/live/TestRegs.java +++ b/frysk-core/frysk/proc/live/TestRegs.java @@ -41,7 +41,6 @@ package frysk.proc.live; import frysk.isa.Register; import frysk.testbed.RegsCase; -import frysk.isa.ISA; /** * Check all register values. @@ -57,13 +56,4 @@ public class TestRegs extends RegsCase { public long getRegister(Object task, Register register) { return task().getRegister(register); } - - // XXX: Delete this once the unresolved cases are fixed. - public void testFloatRegisters() { - if (isa() == ISA.IA32 && unresolved(4911)) - return; - if (isa() == ISA.X8664 && unresolved(5195)) - return; - super.testFloatRegisters(); - } } diff --git a/frysk-core/frysk/testbed/ChangeLog b/frysk-core/frysk/testbed/ChangeLog index f3ebfc6..8d5b4fb 100644 --- a/frysk-core/frysk/testbed/ChangeLog +++ b/frysk-core/frysk/testbed/ChangeLog @@ -1,5 +1,8 @@ 2007-12-03 Andrew Cagney + * RegsCase.java (IA32, X8664): Update X87's FSW, FOP, EIP, CS, DS, + DP, RIP, and RDP. + * TestRegs.java (checkRegisterGroupPresent(String)): New. (testVectorRegistersPresent()): Use. (testFloatRegistersPresent()): Use. diff --git a/frysk-core/frysk/testbed/RegsCase.java b/frysk-core/frysk/testbed/RegsCase.java index 76208c0..ad034a3 100644 --- a/frysk-core/frysk/testbed/RegsCase.java +++ b/frysk-core/frysk/testbed/RegsCase.java @@ -335,20 +335,20 @@ public abstract class RegsCase extends TestLib { // floating-point registers .put(X87Registers.FCW, // 0x1e71 new byte[] { 0x71,0x1e }) - .put(X87Registers.FSW, // 0x47e4 - new byte[] { (byte)0xe4,0x47 }) + .put(X87Registers.FSW, // 0xc7e4 + new byte[] { (byte)0xe4,(byte)0xc7 }) .put(X87Registers.FTW, // 0xc9 new byte[] { (byte)0xc9 }) - .put(X87Registers.FOP, // 0x1e8f - new byte[] { (byte)0x8f,0x1e }) - .put(X87Registers.EIP, // 0x2fc38c68 - new byte[] { 0x68,(byte)0x8c,(byte)0xc3,0x2f }) - .put(X87Registers.CS, // 0x7ac9 - new byte[] { (byte)0xc9,0x7a }) - .put(X87Registers.DP, // 0x6d77e6d5 - new byte[] { (byte)0xd5,(byte)0xe6,0x77,0x6d }) - .put(X87Registers.DS, // 0x2a9f - new byte[] { (byte)0x9f,0x2a }) + .put(X87Registers.FOP, // 0x068f + new byte[] { (byte)0x8f,0x06 }) + .put(X87Registers.EIP, // 0x79d5eeff + new byte[] { (byte)0xff,(byte)0xee,(byte)0xd5,(byte)0x79 }) + .put(X87Registers.CS, // Can't reliably access CS + 0, 0) + .put(X87Registers.DP, // 0xd0acd7b0 + new byte[] { (byte)0xb0,(byte)0xd7,(byte)0xac,(byte)0xd0 }) + .put(X87Registers.DS, // Can't reliably access CS + 0, 0) .put(X87Registers.ST0, // 0xa7367289dc779dba0bd9 new byte[] { (byte)0xd9,0xb,(byte)0xba,(byte)0x9d, 0x77,(byte)0xdc,(byte)0x89,0x72, @@ -477,18 +477,16 @@ public abstract class RegsCase extends TestLib { // floating-point registers .put(X87Registers.FCW, // 0x1e71 new byte[] { 0x71,0x1e }) - .put(X87Registers.FSW, // 0x47e4 - new byte[] { (byte)0xe4,0x47 }) + .put(X87Registers.FSW, // 0xc7e4 + new byte[] { (byte)0xe4,(byte)0xc7 }) .put(X87Registers.FTW, // 0xc9 new byte[] { (byte)0xc9 }) - .put(X87Registers.FOP, // 0x1e8f - new byte[] { (byte)0x8f,0x1e }) - .put(X87Registers.RIP, // 0x99af236679d5eeff - new byte[] { (byte)0xff,(byte)0xee,(byte)0xd5,0x79, - 0x66,0x23,(byte)0xaf,(byte)0x99 }) - .put(X87Registers.RDP, // 0x6988a565d0acd7b0 - new byte[] { (byte)0xb0,(byte)0xd7,(byte)0xac,(byte)0xd0, - 0x65,(byte)0xa5,(byte)0x88,0x69 }) + .put(X87Registers.FOP, // 0x068f + new byte[] { (byte)0x8f,0x06 }) + .put(X87Registers.RIP, // 48-bit + 0x0000236679d5eeffL, 0) + .put(X87Registers.RDP, // 48-bit + 0x00007565d0acd7b0L, 0) .put(X87Registers.ST0, // 0xa7367289dc779dba0bd9 new byte[] { (byte)0xd9,0xb,(byte)0xba,(byte)0x9d, 0x77,(byte)0xdc,(byte)0x89,0x72, hooks/post-receive -- frysk system monitor/debugger