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From: jflavio@sourceware.org
To: frysk-cvs@sourceware.org
Subject: [SCM]  master: Updating register group names.
Date: Tue, 04 Dec 2007 11:01:00 -0000	[thread overview]
Message-ID: <20071204110100.9581.qmail@sourceware.org> (raw)

The branch, master has been updated
       via  40c62026e142f407e00ae74d15e06f3ca42827b8 (commit)
      from  95a13e25dd80d0d529c9ecaedd1c51e506402fb7 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email.

- Log -----------------------------------------------------------------
commit 40c62026e142f407e00ae74d15e06f3ca42827b8
Author: Jose Flavio Aguilar Paulino <joseflavio@gmail.com>
Date:   Tue Dec 4 08:45:03 2007 -0200

    Updating register group names.

-----------------------------------------------------------------------

Summary of changes:
 frysk-core/frysk/isa/ChangeLog           |    9 +++++++++
 frysk-core/frysk/isa/ISA.java            |    8 ++++----
 frysk-core/frysk/isa/PPC32Registers.java |    4 ++--
 frysk-core/frysk/isa/PPC64Registers.java |    4 ++--
 4 files changed, 17 insertions(+), 8 deletions(-)

First 500 lines of diff:
diff --git a/frysk-core/frysk/isa/ChangeLog b/frysk-core/frysk/isa/ChangeLog
index 91b7765..7377c5e 100644
--- a/frysk-core/frysk/isa/ChangeLog
+++ b/frysk-core/frysk/isa/ChangeLog
@@ -1,3 +1,12 @@
+2007-12-04  Jose Flavio Aguilar Paulino <joseflavio@gmail.com>
+
+	* ISA.java: Updating a comment.
+
+	* PPC32Registers.java: Updating register group names to be the same
+	as the IA and x86xx
+
+	* PPC64Registers.java: The same as above.
+
 2007-12-03  Andrew Cagney  <cagney@redhat.com>
 
 	* Registers.java (getFloatRegisterGroup()): Delete.
diff --git a/frysk-core/frysk/isa/ISA.java b/frysk-core/frysk/isa/ISA.java
index 865f14b..fca91a2 100644
--- a/frysk-core/frysk/isa/ISA.java
+++ b/frysk-core/frysk/isa/ISA.java
@@ -74,13 +74,13 @@ public final class ISA {
 
     /*
      * PowerPC is a Bi-Endian archtecture, it supports little and big
-     * endianness. But, usually (99.9%) it is used as a big endian,
-     * in truth in memory the data is stored always in big-endian format
+     * endianness. But, usually (99.9%) it is used as a big endian.
+     * (in truth in memory the data is always stored as big-endian)
      */
     public static final ISA PPC32BE
-	= new ISA(ByteOrder.BIG_ENDIAN, 4, "PowerPC");
+	= new ISA(ByteOrder.BIG_ENDIAN, 4, "PowerPC32BE");
     public static final ISA PPC64BE
-	= new ISA(ByteOrder.BIG_ENDIAN, 8, "PowerPC");
+	= new ISA(ByteOrder.BIG_ENDIAN, 8, "PowerPC64BE");
 
     public static final ISA IA32
 	= new ISA(ByteOrder.LITTLE_ENDIAN, 4, "IA32");
diff --git a/frysk-core/frysk/isa/PPC32Registers.java b/frysk-core/frysk/isa/PPC32Registers.java
index 2226ec8..259e85d 100644
--- a/frysk-core/frysk/isa/PPC32Registers.java
+++ b/frysk-core/frysk/isa/PPC32Registers.java
@@ -249,7 +249,7 @@ public class PPC32Registers extends Registers {
      * Defining Register Groups
      */
     public static final RegisterGroup GENERAL
-	= new RegisterGroup("general",
+	= new RegisterGroup("regs",
                   new Register[] { 
 			  GPR0 , GPR1 , GPR2 , GPR3 , GPR4 , GPR5 , GPR6 , GPR7 , GPR8 , GPR9 ,
 			  GPR10, GPR11, GPR12, GPR13, GPR14, GPR15, GPR16, GPR17, GPR18, GPR19, 
@@ -263,7 +263,7 @@ public class PPC32Registers extends Registers {
 			  MQ, TRAP, DAR, DSISR, RESULT, FPSCR });
 	
     public static final RegisterGroup FLOATING_POINTER
-	= new RegisterGroup("floatingpointer",
+	= new RegisterGroup("float",
                   new Register[] { 
 			  FPR0 , FPR1 , FPR2 , FPR3 , FPR4 , FPR5 , FPR6 , FPR7 , FPR8 , FPR9 ,
 			  FPR10, FPR11, FPR12, FPR13, FPR14, FPR15, FPR16, FPR17, FPR18, FPR19, 
diff --git a/frysk-core/frysk/isa/PPC64Registers.java b/frysk-core/frysk/isa/PPC64Registers.java
index ae2efff..92ed282 100644
--- a/frysk-core/frysk/isa/PPC64Registers.java
+++ b/frysk-core/frysk/isa/PPC64Registers.java
@@ -269,7 +269,7 @@ public class PPC64Registers extends Registers {
      * Defining Register Groups
      */
     public static final RegisterGroup GENERAL
-        = new RegisterGroup("general",
+        = new RegisterGroup("regs",
                   new Register[] {
                           GPR0 , GPR1 , GPR2 , GPR3 , GPR4 , GPR5 , GPR6 , GPR7 , GPR8 , GPR9 ,
                           GPR10, GPR11, GPR12, GPR13, GPR14, GPR15, GPR16, GPR17, GPR18, GPR19,
@@ -284,7 +284,7 @@ public class PPC64Registers extends Registers {
                         FPSCR, VRSAVE, VSCR, SPEACC, SPEFSCR });
 
     public static final RegisterGroup FLOATING_POINTER
-        = new RegisterGroup("floatingpointer",
+        = new RegisterGroup("float",
                   new Register[] {
                           FPR0 , FPR1 , FPR2 , FPR3 , FPR4 , FPR5 , FPR6 , FPR7 , FPR8 , FPR9 ,
                           FPR10, FPR11, FPR12, FPR13, FPR14, FPR15, FPR16, FPR17, FPR18, FPR19,


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                 reply	other threads:[~2007-12-04 11:01 UTC|newest]

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