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From: "David S. Miller" <>
Subject: Re: Maximum Alignment Restrictions
Date: Thu, 11 Jan 1996 11:37:00 -0000	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <Pine.SV4.3.91.960111113044.4093B-100000@merlin>

   Date: Thu, 11 Jan 1996 11:32:55 -0600 (CST)
   From: Joel Sherrill <>

   What is the rationale for the maximum alignment supported on a particular 
   CPU family?  

   My current problem is that the SPARC trap table must be on a 4K boundary
   but that appears to be too large. 

Note that many of these restrictions eminate from the
linkers/assemblers which gcc has to interface with.

As for your trap table alignment problem, I have no problem getting
mine properly aligned in my kernels at all.  I know where I am going
to fix the text start address in the final link, so I know where the
text segment will be in the first object file I feed to the linker.
So this is where I place the trap table etc... this is what all Sparc
OS's do btw, check out netbsd/openbsd or Sparc Linux for example.  It
is not really a problem.

David S. Miller

      parent reply	other threads:[~1996-01-11 11:37 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
1996-01-11  9:41 Joel Sherrill
1996-01-11 11:22 ` Ian Lance Taylor
1996-01-11 11:37 ` David S. Miller [this message]

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