From mboxrd@z Thu Jan  1 00:00:00 1970
From: Joel Sherrill <joel@OARcorp.com>
To: gas2@cygnus.com
Subject: Re: binutils bug you reported (fwd)
Date: Thu, 25 Sep 1997 06:16:00 -0000
Message-id: <Pine.BSF.3.96.970925073710.16864A-100000@vespucci.advicom.net>
X-SW-Source: 1997/msg00017.html

Here is a little more information on the binutils patch I got from a user.

If it is not enough or you need me to send you a manual page or two, let
me know.

--joel


---------- Forwarded message ----------
Date: Wed, 24 Sep 97 16:09:00 -0600
From: Eric Norum <eric@skatter.USask.Ca>
To: Joel Sherrill <joel@OARcorp.com>
Subject: Re: binutils bug you reported

You wrote:
> Do you have a test case or description? Ian was going to merge it
> but did not understand why it was necessary.
>
> --joel
>

Here's the file I got from the Linux people:
===================================================================

I guess, there are two small bug in gas (binutils 2.8.1), concerning cpu32
targets (68332).

1. 'tst.l a0' won't assemble any more (it worked fine in version 2.6). The
        reason is, that this addressing mode is allowed in
        'binutils-2.8.1/opcodes/m68k-opc.c'only for targets 'm68020up'. 
        My cpu32 reference manual (cpu32rm/ad rev 1) allows this  
addressing
        mode for word and long word operation

        I suggest one should change /binutils-2.8.1/opcodes/m68k-opc.c:

        original code:

        {"tstb", one(0045000), one(0177700), ";b", m68020up | mcf5200 },
        {"tstb", one(0045000), one(0177700), "@b", m68000up },
        {"tstw", one(0045100), one(0177700), "*w", m68020up | mcf5200 },
        {"tstw", one(0045100), one(0177700), "@w", m68000up },
        {"tstl", one(0045200), one(0177700), "*l", m68020up | mcf5200 },
        {"tstl", one(0045200), one(0177700), "@l", m68000up },

        new code:

>>>     {"tstb", one(0045000), one(0177700), ";b", m68020up |  
mcf5200 | cpu32 },
        {"tstb", one(0045000), one(0177700), "@b", m68000up },
>>>     {"tstw", one(0045100), one(0177700), "*w", m68020up |  
mcf5200 | cpu32 },
        {"tstw", one(0045100), one(0177700), "@w", m68000up },
>>>     {"tstl", one(0045200), one(0177700), "*l", m68020up |  
mcf5200 | cpu32 },
        {"tstl", one(0045200), one(0177700), "@l", m68000up },

2. 'tblu.w a0@,d0' won't assemble. The error message tells something about
        'invalid operand'. The table lookup and interpolate opcode  
(tbls, tblsn,
        tblu, tblun) allows two types of operands:

          eg:
                tblu.<size>     <ea>,Dx
                tblu.<size>     Dym:Dyn,Dx

        The first one (wich is not allowed by gas) is similar to the
        addressing mode of the 'mulu' opcode, except immediate data,
        so made the following change to  
/binutils-2.8.1/opcodes/m68k-opc.c:

        original code:

        #define TBL1(name,signed,round,size)                          
       \
          {name, two(0174000,  
(signed<<11)|(!round<<10)|(size<<6)|0000400), \
             two(0177700,0107777), "`sD1", cpu32 },                   
       \
          {name, two(0174000, (signed<<11)|(!round<<10)|(size<<6)),   
       \
             two(0177770,0107770), "DsD3D1", cpu32 }

        new code:

        #define TBL1(name,signed,round,size)                          
       \
          {name, two(0174000,  
(signed<<11)|(!round<<10)|(size<<6)|0000400), \
>>>          two(0177700,0107777), "@lD1", cpu32 },                   
       \
          {name, two(0174000, (signed<<11)|(!round<<10)|(size<<6)),   
       \
             two(0177770,0107770), "DsD3D1", cpu32 }


---
Eric Norum                                 eric@skatter.usask.ca
Saskatchewan Accelerator Laboratory        Phone: (306) 966-6308
University of Saskatchewan                 FAX:   (306) 966-6058
Saskatoon, Canada.