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From: Joel Sherrill <>
Subject: Maximum Alignment Restrictions
Date: Thu, 11 Jan 1996 09:41:00 -0000	[thread overview]
Message-ID: <Pine.SV4.3.91.960111113044.4093B-100000@merlin> (raw)

What is the rationale for the maximum alignment supported on a particular 
CPU family?  

My current problem is that the SPARC trap table must be on a 4K boundary
but that appears to be too large. 

My thinking is that there is no particular reason (except object format 
limitations) to place a CPU dependent limit on maximum alignment boundary.

Just curious.

| Joel Sherrill                          | Sr. Computer Scientist         |
|      | On-Line Applications Research  |
| Ask me about RTEMS: a free real-time   | Huntsville AL 35805            |
|   multiprocessor executive!            | (205) 883-0131                 |

             reply	other threads:[~1996-01-11  9:41 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
1996-01-11  9:41 Joel Sherrill [this message]
1996-01-11 11:22 ` Ian Lance Taylor
1996-01-11 11:37 ` David S. Miller

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