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* Re: bug in new ia32 backend
1999-06-30 23:07 ` Richard Henderson
@ 1999-06-22 12:09 ` John S. Dyson
1999-06-30 23:07 ` Toon Moene
0 siblings, 1 reply; 16+ messages in thread
From: John S. Dyson @ 1999-06-22 12:09 UTC (permalink / raw)
To: Richard Henderson; +Cc: mrs, egcs-bugs
> On Mon, Jun 21, 1999 at 08:22:00PM -0700, Mike Stump wrote:
> > Not sure where all the code went or why... merge droppage or
> > semi-intentional?
>
> Unintentional.
>
> Now I remember. That work wasn't done on a branch, so my diffs
> between branchpoints didn't pick it up. I'll go back and look
> for the rest of the code associated with peephole2.
>
>
FWIW, when running on my SMP PPro system, the new EGCS/ia32 stuff
is significantly faster when running my simple set of benchmarks.
I sometimes use spice (circuit analysis), and if I get a chance,
I'll try to provide some feedback on the behavior. So far, the
stuff looks alot like what has been needed on the ia32 for a
long, long time.
John
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
1999-06-22 12:09 ` John S. Dyson
@ 1999-06-30 23:07 ` Toon Moene
1999-06-30 23:07 ` Kudos about ia32 stuff so far John S. Dyson
0 siblings, 1 reply; 16+ messages in thread
From: Toon Moene @ 1999-06-30 23:07 UTC (permalink / raw)
To: John S. Dyson; +Cc: Richard Henderson, mrs, egcs-bugs
John S. Dyson wrote:
> FWIW, when running on my SMP PPro system, the new EGCS/ia32 stuff
> is significantly faster when running my simple set of benchmarks.
> I sometimes use spice (circuit analysis), and if I get a chance,
> I'll try to provide some feedback on the behavior. So far, the
> stuff looks alot like what has been needed on the ia32 for a
> long, long time.
Doesn't sound like a bug to me (see subject :-)
Is that F spice or C spice ?
Cheers,
--
Toon Moene (toon@moene.indiv.nluug.nl)
Saturnushof 14, 3738 XG Maartensdijk, The Netherlands
Phone: +31 346 214290; Fax: +31 346 214286
GNU Fortran: http://world.std.com/~burley/g77.html
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
@ 1999-06-30 23:07 Mike Stump
1999-06-30 23:07 ` Richard Henderson
0 siblings, 1 reply; 16+ messages in thread
From: Mike Stump @ 1999-06-30 23:07 UTC (permalink / raw)
To: egcs-bugs, rth
> Date: Mon, 21 Jun 1999 20:04:27 -0700
> From: Richard Henderson <rth@cygnus.com>
> To: Mike Stump <mrs@wrs.com>, egcs-bugs@egcs.cygnus.com
> On Mon, Jun 21, 1999 at 07:18:49PM -0700, Mike Stump wrote:
> > The problem is that match_scratch appears to want to use (reg:SI 16
> > argp), even though this is a _fake_ register.
> This should not be happening. find_free_register is supposed to
> be ignoring fixed registers. From the cygnus source --
> /* Don't allocate fixed registers. */
> if (fixed_regs[regno])
> continue;
> I'm in the process of creating a branch off mainline that these
> new patches can be dumped in while we're evaluating them. It'll
> be `new_ia32_branch' (unimaginitively) once cvs is finished.
Ah, before:
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
int regno;
int success;
#ifdef REG_ALLOC_ORDER
regno = reg_alloc_order [i];
#else
regno = i;
#endif
/* Don't allocate fixed registers. */
if (fixed_regs[regno])
continue;
/* Make sure the register is of the right class. */
if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno))
continue;
/* And can support the mode we need. */
if (! HARD_REGNO_MODE_OK (regno, mode))
continue;
/* And that we don't create an extra save/restore. */
if (! call_used_regs[regno] && ! regs_ever_live[regno])
continue;
success = 1;
for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
{
if (TEST_HARD_REG_BIT (*reg_set, regno + j)
|| TEST_HARD_REG_BIT (used.regs, regno + j))
after:
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
int success = 1;
if (! TEST_HARD_REG_BIT (reg_class_contents[class], i))
continue;
for (j = HARD_REGNO_NREGS (i, mode) - 1; j >= 0; j--)
{
if (TEST_HARD_REG_BIT (*reg_set, i + j)
|| TEST_HARD_REG_BIT (used.regs, i + j))
Not sure where all the code went or why... merge droppage or
semi-intentional? I'll add the missing bits to my tree and continue
testing. As the new branch comes online, I will update to it, and
test that way (and submit real patches against it)...
^ permalink raw reply [flat|nested] 16+ messages in thread
* Kudos about ia32 stuff so far.
1999-06-30 23:07 ` Toon Moene
@ 1999-06-30 23:07 ` John S. Dyson
0 siblings, 0 replies; 16+ messages in thread
From: John S. Dyson @ 1999-06-30 23:07 UTC (permalink / raw)
To: Toon Moene; +Cc: rth, mrs, egcs-bugs
> John S. Dyson wrote:
>
> > FWIW, when running on my SMP PPro system, the new EGCS/ia32 stuff
> > is significantly faster when running my simple set of benchmarks.
> > I sometimes use spice (circuit analysis), and if I get a chance,
> > I'll try to provide some feedback on the behavior. So far, the
> > stuff looks alot like what has been needed on the ia32 for a
> > long, long time.
>
> Doesn't sound like a bug to me (see subject :-)
>
Sorry, I am not always good at etiquette!!! (I changed
the subject!!!)
>
> Is that F spice or C spice ?
>
Because I am so cheap, I use both spice2g6 (fspice) and
spice3f5 (cspice.) When fspice doesn't appear to work
well (usually because of feature issues), I try cspice. I
would much rather use Aplac, but at those prices, I
could purchase another machine.
So, my plan is to compile and try fspice first with the ia32
changes, and later play with cspice. (Note that I preprocess
the source with f2c for now, because of the way that it is
set-up, but plan to try g77 later on.) It might eventually be
interesting to do a comparison between f2c/egcs(with ia32
improvements) and g77 with ia32 improvements.
So, my first try will be to compare gcc/egcs-current and gcc/egcs
with the ia32 stuff. Tonight, I have a deadline for work, but
will try to do it tonight or tomorrow.
John
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
1999-06-30 23:07 bug in new ia32 backend Mike Stump
@ 1999-06-30 23:07 ` Richard Henderson
1999-06-22 12:09 ` John S. Dyson
0 siblings, 1 reply; 16+ messages in thread
From: Richard Henderson @ 1999-06-30 23:07 UTC (permalink / raw)
To: Mike Stump; +Cc: egcs-bugs
On Mon, Jun 21, 1999 at 08:22:00PM -0700, Mike Stump wrote:
> Not sure where all the code went or why... merge droppage or
> semi-intentional?
Unintentional.
Now I remember. That work wasn't done on a branch, so my diffs
between branchpoints didn't pick it up. I'll go back and look
for the rest of the code associated with peephole2.
r~
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
1999-06-21 19:19 Mike Stump
@ 1999-06-30 23:07 ` Richard Henderson
0 siblings, 0 replies; 16+ messages in thread
From: Richard Henderson @ 1999-06-30 23:07 UTC (permalink / raw)
To: Mike Stump, egcs-bugs
On Mon, Jun 21, 1999 at 07:18:49PM -0700, Mike Stump wrote:
> The problem is that match_scratch appears to want to use (reg:SI 16
> argp), even though this is a _fake_ register.
This should not be happening. find_free_register is supposed to
be ignoring fixed registers. From the cygnus source --
/* Don't allocate fixed registers. */
if (fixed_regs[regno])
continue;
I'm in the process of creating a branch off mainline that these
new patches can be dumped in while we're evaluating them. It'll
be `new_ia32_branch' (unimaginitively) once cvs is finished.
r~
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
1999-06-28 16:12 Mike Stump
@ 1999-06-30 23:07 ` Richard Henderson
0 siblings, 0 replies; 16+ messages in thread
From: Richard Henderson @ 1999-06-30 23:07 UTC (permalink / raw)
To: Mike Stump; +Cc: toon, egcs-bugs
On Mon, Jun 28, 1999 at 04:12:15PM -0700, Mike Stump wrote:
> I did see the bootstrap problem. I reran all the bugs I found in the
> original run, and it seems like they are all fixed.
>
> I'll track down the bootstrap problem and send out what I find.
I checked in a fix about an hour ago that has fixed all of the
bootstrap and testsuite regressions in my tree. At least for
the no-extra-options case. I'll be trying again with -march=i686
and the like shortly.
r~
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
@ 1999-06-30 23:07 Mike Stump
0 siblings, 0 replies; 16+ messages in thread
From: Mike Stump @ 1999-06-30 23:07 UTC (permalink / raw)
To: rth; +Cc: egcs-bugs, toon
> Date: Mon, 28 Jun 1999 16:21:21 -0700
> From: Richard Henderson <rth@cygnus.com>
> On Mon, Jun 28, 1999 at 04:12:15PM -0700, Mike Stump wrote:
> > I did see the bootstrap problem. I reran all the bugs I found in the
> > original run, and it seems like they are all fixed.
> >
> > I'll track down the bootstrap problem and send out what I find.
> I checked in a fix about an hour ago that has fixed all of the
> bootstrap and testsuite regressions in my tree. At least for the
> no-extra-options case. I'll be trying again with -march=i686 and
> the like shortly.
But, but, I started with an up-to-date tree! :-) Thanks. Below is
the cut down testcase of what caused the non-bootstrap... (useless,
but I include it for completeness)
I confirmed that with a now-up-to-date loop.c, this testcase works. I
cleaned my tree, and am starting a rebuild (bootstrap) and test. The
previous testsuite run found a few regressions in gcc (others ok, but
libobjc inconclusive), that with just a little luck, will just go
away.
Sometime after I get more testing into it, I will recompile all of
VxWorks with the whole shabang and see if it boots. Thus providing a
bit more testing.
The auditing of the patches is going to be hard (for lost recent egcs
work). I have been putting it off due to the hardness of it. :-( I
not quite sure what all could have been lost, and not sure how to
ensure it wasn't. I think the answer is limited to just the
i386.{c,h,md} files, and will start with them. I guess I will work
from recent to old egcs work, revision by revision ensuring the work
is in until I reach work that I know has been put in. If you know
that this isn't complete or won't work, let me know. The objective is
to be comprehensive enough so that we can merge into egcs without
objections (or problems).
struct function {
int reg_rtx_no;
};
int reg_rtx_no;
static int sequence_result[5 ];
void restore_emit_status (p) struct function *p; {
int i;
reg_rtx_no = p->reg_rtx_no;
for (i = 0; i < 5 ; i++)
sequence_result[i] = 0;
}
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
1999-06-24 16:14 Mike Stump
1999-06-30 23:07 ` Jeffrey A Law
@ 1999-06-30 23:07 ` Richard Henderson
1999-06-30 23:07 ` Toon Moene
2 siblings, 0 replies; 16+ messages in thread
From: Richard Henderson @ 1999-06-30 23:07 UTC (permalink / raw)
To: Mike Stump; +Cc: egcs-bugs
On Thu, Jun 24, 1999 at 04:14:54PM -0700, Mike Stump wrote:
> This wasn't in any of the raw patches, so this was a
> clobber of new work, bad.
I said up front in the announcement this was true, that there was
work from mainline egcs that needed to be merged.
> I'll see about auditing the raw files with the pass0 file,
> and see what else I can come up with.
Please do.
r~
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
1999-06-24 16:14 Mike Stump
1999-06-30 23:07 ` Jeffrey A Law
1999-06-30 23:07 ` Richard Henderson
@ 1999-06-30 23:07 ` Toon Moene
2 siblings, 0 replies; 16+ messages in thread
From: Toon Moene @ 1999-06-30 23:07 UTC (permalink / raw)
To: Mike Stump; +Cc: egcs-bugs, rth
Mike Stump wrote:
> I have completed a full (gcc/g++/g77/objc/libio/libstdc++) testsuite
> run (linux native), and only found one problem...
Mike, I've tried to get a successful bootstrap with your patches (on
i686-pc-linux-gnu) but failed: The stage1 compiler hangs while
compiling regclass.c (compiling options -O2 -g).
Although I do not agree with your "solution" to the null JUMP_LABEL
field in the routine loop_iterations in unroll.c, you might be able to
give "the rest of us" useful information because your build completes.
What I would like you to do is to send me the uuencoded, gzip'd tar file
of the following:
A compilation of your test program [that originally blew up due to
JUMP_LABEL being zero], using *your* compiler, with the following flags:
-O2 -g -da
This will enable me to see which pass mangles the JUMP_LABEL, which
might make searching for the culprit somewhat simpler.
Thanks in advance,
--
Toon Moene (toon@moene.indiv.nluug.nl)
Saturnushof 14, 3738 XG Maartensdijk, The Netherlands
Phone: +31 346 214290; Fax: +31 346 214286
GNU Fortran: http://world.std.com/~burley/g77.html
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
1999-06-24 16:14 Mike Stump
@ 1999-06-30 23:07 ` Jeffrey A Law
1999-06-30 23:07 ` Richard Henderson
1999-06-30 23:07 ` Toon Moene
2 siblings, 0 replies; 16+ messages in thread
From: Jeffrey A Law @ 1999-06-30 23:07 UTC (permalink / raw)
To: Mike Stump; +Cc: egcs-bugs, rth
In message < 199906242314.QAA26484@kankakee.wrs.com >you write:
> *** ./gcc/unroll.c.~1~ Fri Jun 18 15:03:49 1999
> --- ./gcc/unroll.c Tue Jun 22 18:51:14 1999
> *************** loop_iterations (loop_start, loop_end, l
[ ... ]
I've already stated that I think this patch is just papering over a more
serious bug elsewhere. At this point in the code you should not have jumps
with a null JUMP_LABEL. You need to do more digging here.
jeff
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
@ 1999-06-28 16:12 Mike Stump
1999-06-30 23:07 ` Richard Henderson
0 siblings, 1 reply; 16+ messages in thread
From: Mike Stump @ 1999-06-28 16:12 UTC (permalink / raw)
To: toon; +Cc: egcs-bugs, rth
> Date: Sat, 26 Jun 1999 21:53:22 +0200
> From: Toon Moene <toon@moene.indiv.nluug.nl>
> To: Mike Stump <mrs@wrs.com>
> What I would like you to do is to send me the uuencoded, gzip'd tar file
> of the following
I can now confirm that my testcase doesn't fail with top of the ia32
branch, so this bug appears to be fixed. Because it appears fixed, I
wont bother sending any files. I am rerunning the all the testsuites.
I did see the bootstrap problem. I reran all the bugs I found in the
original run, and it seems like they are all fixed.
I'll track down the bootstrap problem and send out what I find.
>From rth@cygnus.com Mon Jun 28 16:21:00 1999
From: Richard Henderson <rth@cygnus.com>
To: Mike Stump <mrs@wrs.com>
Cc: toon@moene.indiv.nluug.nl, egcs-bugs@egcs.cygnus.com
Subject: Re: bug in new ia32 backend
Date: Mon, 28 Jun 1999 16:21:00 -0000
Message-id: <19990628162121.A13359@cygnus.com>
References: <199906282312.QAA11669@kankakee.wrs.com> <199906282312.QAA11669@kankakee.wrs.com>
X-SW-Source: 1999-06/msg00935.html
Content-length: 474
On Mon, Jun 28, 1999 at 04:12:15PM -0700, Mike Stump wrote:
> I did see the bootstrap problem. I reran all the bugs I found in the
> original run, and it seems like they are all fixed.
>
> I'll track down the bootstrap problem and send out what I find.
I checked in a fix about an hour ago that has fixed all of the
bootstrap and testsuite regressions in my tree. At least for
the no-extra-options case. I'll be trying again with -march=i686
and the like shortly.
r~
>From nathan@cs.hmc.edu Mon Jun 28 16:36:00 1999
From: Nathan Field <nathan@cs.hmc.edu>
To: egcs-bugs@egcs.cygnus.com
Cc: staff@turing.cs.hmc.edu
Subject: Build of snapshots failed on Solaris 2.6
Date: Mon, 28 Jun 1999 16:36:00 -0000
Message-id: <Pine.GSO.4.10.9906280922590.27753-100000@turing.cs.hmc.edu>
X-SW-Source: 1999-06/msg00936.html
Content-length: 4653
I am using a SPARC Solaris 2.6 machine, and I am unable to compile any of
the last three snapshots of egcs 1.95, or the current egcs-1.1.2 release.
When I attempt to build the 19990616 or 19990623 snapshots it complains
about not knowing how to build a system.h file in the texinfo/lib
directory. I coppied the entire texinfo/lib directory into my
objdir/texinfo/lib tree and then tried make bootstrap again (this is for
the 23 snapshot, I have not attempted this on the 16 snapshot). It next
failed on:
Making info file `ch/chill.info' from
`../../egcs-19990623/gcc/ch/chill.texi'.
make: Fatal error: Don't know how to make target `f/intdoc.c'
Current working directory /export/proj/nathan/egcs/objdir-test/gcc
*** Error code 1
make: Fatal error: Command failed for target `bootstrap'
Current working directory /export/proj/nathan/egcs/objdir-test/gcc
*** Error code 1
make: Fatal error: Command failed for target `bootstrap'
I coppied gcc/f/* into objdir-test/gcc/f and tried. There were a lot of
errors about "mv: cannot access <various things>", and the compile next
failed with this:
./gengenrtl tmp-genrtl.h tmp-genrtl.c
*** Signal 11
make: Fatal error: Command failed for target `s-genrtl'
Current working directory /export/proj/nathan/egcs/objdir-test/gcc
*** Error code 1
make: Fatal error: Command failed for target `bootstrap'
Current working directory /export/proj/nathan/egcs/objdir-test/gcc
*** Error code 1
make: Fatal error: Command failed for target `bootstrap'
I then tried the following sequence:
make clean
cp <path to egcs>/texinfo/lib/* texinfo/lib
yes n | cp -r <path to egcs>/gcc/f/* gcc/f
make bootstrap
This failed with:
./gengenrtl tmp-genrtl.h tmp-genrtl.c
*** Signal 11
make: Fatal error: Command failed for target `s-genrtl'
Current working directory /export/proj/nathan/egcs/objdir-test/gcc
*** Error code 1
make: Fatal error: Command failed for target `bootstrap'
Current working directory /export/proj/nathan/egcs/objdir-test/gcc
*** Error code 1
make: Fatal error: Command failed for target `bootstrap'
At this point I got sick of hacking away at it, so I gave up and am
looking for assistance from higher beings :)
The 19990608 snapshot did not have the system.h dependency problem, but it
does have the "Don't know how to make target f/intdoc.c" problem.
I also tried building the egcs-1.1.2, and it had the same system.h
dependency problem. When I coppied them in by hand it had the following
problem:
ar rc libio.a filedoalloc.o floatconv.o genops.o fileops.o iovfprintf.o
iovfscanf.o ioignore.o iopadn.o iofgetpos.o iofread.o iofscanf.o
iofsetpos.o iogetdelim.o iogetline.o ioprintf.o ioseekoff.o ioseekpos.o
outfloat.o strops.o iofclose.o iopopen.o ioungetc.o peekc.o iogetc.o
ioputc.o iofeof.o ioferror.o iofdopen.o iofflush.o iofgets.o iofopen.o
iofprintf.o iofputs.o iofwrite.o iogets.o ioperror.o ioputs.o ioscanf.o
iosetbuffer.o iosetvbuf.o iosprintf.o iosscanf.o ioftell.o iovsscanf.o
iovsprintf.o ioprims.o iostrerror.o cleanup.o stdfiles.o
ar: cannot open peekc.o
No such file or directory
ar: cannot open iogetc.o
No such file or directory
ar: cannot open ioputc.o
No such file or directory
ar: cannot open iofeof.o
No such file or directory
ar: cannot open ioferror.o
No such file or directory
ar: peekc.o not found
ar: iogetc.o not found
ar: ioputc.o not found
ar: iofeof.o not found
ar: ioferror.o not found
*** Error code 5
make: Fatal error: Command failed for target `libio.a'
Current working directory
/export/proj/nathan/egcs/objdir-1.1.2/sparc-sun-solaris2.6/libio
*** Error code 1
make: Fatal error: Command failed for target `all-target-libio'
Current working directory /export/proj/nathan/egcs/objdir-1.1.2
*** Error code 1
make: Fatal error: Command failed for target `bootstrap'
This all seems very strange since some of these releases have been around
and used for quite some time now. I would have thought simple compile
time errors like these would have been caught long ago. However, I have
pored through the installation instructions, and I believe that I have
followed them to the letter, and I still can't get anything to work. Any
help would be greatly appreciated, as I am totally lost here.
Here's the info on the compiler used for this:
(80) nathan@turing /proj/nathan/egcs/objdir-1.1.2 -> gcc -v
Reading specs from /usr/lib/gcc-lib/sparc-sun-solaris2.6/gcc-2.95/specs
gcc version gcc-2.95 19990608 (prerelease)
nathan
------------
Nathan Field Root is not something to be shared with strangers.
"One World, One Web, One Program" - Microsoft Promotional Ad
"Ein Volk, Ein Reich, Ein Fuhrer" - Adolf Hitler
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
@ 1999-06-28 13:31 Mike Stump
0 siblings, 0 replies; 16+ messages in thread
From: Mike Stump @ 1999-06-28 13:31 UTC (permalink / raw)
To: toon; +Cc: egcs-bugs, rth
> Date: Sat, 26 Jun 1999 21:53:22 +0200
> From: Toon Moene <toon@moene.indiv.nluug.nl>
> To: Mike Stump <mrs@wrs.com>
> Mike, I've tried to get a successful bootstrap with your patches (on
> i686-pc-linux-gnu) but failed: The stage1 compiler hangs while
> compiling regclass.c (compiling options -O2 -g).
As I have reported, I have fixed loop.c to version 1.162. I suspect
recent checkins by Mark have fixed the problem I worked around, but
have not verified it.
> Although I do not agree with your "solution" to the null JUMP_LABEL
> field in the routine loop_iterations in unroll.c,
No, that wasn't a fix or a solution. That was just a hack around to
allow me to continue testing, as I wanted complete test coverage, as
soon as possible. I wanted to point out all the problems that might
exist as soon as I could. I've done that. Now I will go back, resync
my tree, and retest again, and see what work arounds are necessary,
and then go back and develop the fixes into real fixes.
> What I would like you to do is to send me the uuencoded, gzip'd tar file
> of the following
Let me resync, then we will have a common source tree to talk about.
Also, as I redive back into it, in this pass I will do much more
analysis than the first one. I will provide a pointer to what routine
zeroed it, or what routine created it...
I will see about sending you what you requested... I think you can
get it yourself by not bootstrapping. bootstrapping isn't necessary
for development, or for verification of other bugs. It is a way to
run additional tests and checks, or to work around bugs that may exist
with a native compiler. If you native compiler is buggy, select a
different one.
>From jj@pobox.com Mon Jun 28 14:02:00 1999
From: Jesper Juul <jj@pobox.com>
To: egcs-bugs@egcs.cygnus.com
Subject: Signal 11 building 19990623 on Linux 2.2.5
Date: Mon, 28 Jun 1999 14:02:00 -0000
Message-id: <1.5.4.32.19990628210118.006b7d54@mail.soup.dk>
X-SW-Source: 1999-06/msg00933.html
Content-length: 1248
I have for a continuosly failed to build various snapshots of egcs on an
Intel (Celereon 400) Linux system (Red Hat 5.2, both plain and later
upgraded to kernel 2.2.5-15.)
Just to make sure I am not doing something wrong:
I unpack the egcs-core to /opt/egcs,
I make /opt/egcsbuild and /opt/egcsoutput dirs.
I go to the /opt/egcsbuild dir.
I type ../egcs/configure --prefix==/opt/egcsoutput --enable-threads==posix
This works.
I type make bootstrap.
The process starts, but invariably ends in the /opt/egcsbuild/gcc directory:
echo "int xxy_us_dummy;" >tmp-dum.c
./xgcc -B./ -B/opt/egcsoutput/i686-pc-linux-gnu/bin
-I/opt/egcsoutput/i686-pc-linux/gnu/include -S tmp-dum.c
xgcc: Internal compiler error: program cpp got fatal signal 11
Typing ./cpp tmp-dum.c gives me:
# 1 "tmp-dum.c"
inx xxy_us_dummy;
Segmentation fault (core dumped)
I've tried the same without specifying threads and without creating or
specifiying the output dir, same result.
So the question is: Am I doing something wrong?
If so, what, if not, can anyone point to a combination of libraries and
versions that has successfully built egcs?
Thanks,
-Jesper Juul
jesper@soup.dk
PS.
Software versions:
gcc 2.7.2.3-14
binutils 2.9.1.0.15-1
bison 1.25-5
glibc 2.1.1.6
^ permalink raw reply [flat|nested] 16+ messages in thread
* bug in new ia32 backend
@ 1999-06-24 16:14 Mike Stump
1999-06-30 23:07 ` Jeffrey A Law
` (2 more replies)
0 siblings, 3 replies; 16+ messages in thread
From: Mike Stump @ 1999-06-24 16:14 UTC (permalink / raw)
To: egcs-bugs; +Cc: rth
I have completed a full (gcc/g++/g77/objc/libio/libstdc++) testsuite
run (linux native), and only found one problem...
Merge droppage:
FAIL: gcc.dg/990424-1.c (test for excess errors)
caused by (i386.h):
! { "preferred-stack-boundary=", &i386_preferred_stack_boundary_string, "Attem
pt to keep stack aligned to this power of 2" }, \
! { "branch-cost=", &i386_branch_cost_string, "Branches are this expensive (
1-5, arbitrary units)" }, \
in pass0. This wasn't in any of the raw patches, so this was a
clobber of new work, bad. I'll see about auditing the raw files with
the pass0 file, and see what else I can come up with. I was using the
first set of patches, and a very recent snapshot with fixes previously
described and an older loop.c with one seemingly related bug fix.
I see the branch is done, so I will switch over to it.
For completeness, below you will find what I tested with.
Doing diffs in .:
*** ./gcc/reg-stack.c.~1~ Fri Jun 18 15:03:49 1999
--- ./gcc/reg-stack.c Fri Jun 18 16:38:40 1999
*************** stack_regs_mentioned (pat)
*** 374,379 ****
--- 374,382 ----
register char *fmt;
register int i;
+ if (pat == 0)
+ return 0;
+
if (STACK_REG_P (pat))
return 1;
*** ./gcc/unroll.c.~1~ Fri Jun 18 15:03:49 1999
--- ./gcc/unroll.c Tue Jun 22 18:51:14 1999
*************** loop_iterations (loop_start, loop_end, l
*** 3669,3675 ****
/* If there is a more than a single jump to the top of the loop
we cannot (easily) determine the iteration count. */
! if (LABEL_NUSES (JUMP_LABEL (last_loop_insn)) > 1)
{
if (loop_dump_stream)
fprintf (loop_dump_stream,
--- 3669,3676 ----
/* If there is a more than a single jump to the top of the loop
we cannot (easily) determine the iteration count. */
! if (JUMP_LABEL (last_loop_insn) == 0
! || LABEL_NUSES (JUMP_LABEL (last_loop_insn)) > 1)
{
if (loop_dump_stream)
fprintf (loop_dump_stream,
*** ./gcc/resource.c.~1~ Fri Jun 18 15:03:49 1999
--- ./gcc/resource.c Tue Jun 22 14:28:14 1999
*************** find_free_register (current_insn, class_
*** 1263,1276 ****
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
! int success = 1;
! if (! TEST_HARD_REG_BIT (reg_class_contents[class], i))
! continue;
! for (j = HARD_REGNO_NREGS (i, mode) - 1; j >= 0; j--)
{
! if (TEST_HARD_REG_BIT (*reg_set, i + j)
! || TEST_HARD_REG_BIT (used.regs, i + j))
{
success = 0;
break;
--- 1263,1295 ----
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
! int regno;
! int success;
! #ifdef REG_ALLOC_ORDER
! regno = reg_alloc_order [i];
! #else
! regno = i;
! #endif
!
! /* Don't allocate fixed registers. */
! if (fixed_regs[regno])
! continue;
! /* Make sure the register is of the right class. */
! if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno))
! continue;
! /* And can support the mode we need. */
! if (! HARD_REGNO_MODE_OK (regno, mode))
! continue;
! /* And that we don't create an extra save/restore. */
! if (! call_used_regs[regno] && ! regs_ever_live[regno])
! continue;
!
! success = 1;
! for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
{
! if (TEST_HARD_REG_BIT (*reg_set, regno + j)
! || TEST_HARD_REG_BIT (used.regs, regno + j))
{
success = 0;
break;
*************** find_free_register (current_insn, class_
*** 1278,1288 ****
}
if (success)
{
! for (j = HARD_REGNO_NREGS (i, mode) - 1; j >= 0; j--)
{
! SET_HARD_REG_BIT (*reg_set, i + j);
}
! return gen_rtx_REG (mode, i);
}
}
return NULL_RTX;
--- 1297,1307 ----
}
if (success)
{
! for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
{
! SET_HARD_REG_BIT (*reg_set, regno + j);
}
! return gen_rtx_REG (mode, regno);
}
}
return NULL_RTX;
*** ./gcc/loop.c.~1~ Fri Jun 18 15:03:47 1999
--- ./gcc/loop.c Wed Jun 23 18:49:35 1999
*************** combine_givs_p (g1, g2)
*** 6976,6982 ****
return NULL_RTX;
ret = comb = express_from (g1, g2);
! if (g1->mode != g2->mode)
ret = gen_lowpart (g2->mode, comb);
/* If these givs are identical, they can be combined. We use the results
--- 6976,6982 ----
return NULL_RTX;
ret = comb = express_from (g1, g2);
! if (ret && g1->mode != g2->mode)
ret = gen_lowpart (g2->mode, comb);
/* If these givs are identical, they can be combined. We use the results
--------------
>From law@cygnus.com Thu Jun 24 16:24:00 1999
From: Jeffrey A Law <law@cygnus.com>
To: mrs@wrs.com (Mike Stump)
Cc: egcs-bugs@egcs.cygnus.com, rth@cygnus.com
Subject: Re: bug in new ia32 backend
Date: Thu, 24 Jun 1999 16:24:00 -0000
Message-id: <5447.930266667@upchuck.cygnus.com>
References: <199906242314.QAA26484@kankakee.wrs.com>
X-SW-Source: 1999-06/msg00805.html
Content-length: 448
In message < 199906242314.QAA26484@kankakee.wrs.com >you write:
> *** ./gcc/unroll.c.~1~ Fri Jun 18 15:03:49 1999
> --- ./gcc/unroll.c Tue Jun 22 18:51:14 1999
> *************** loop_iterations (loop_start, loop_end, l
[ ... ]
I've already stated that I think this patch is just papering over a more
serious bug elsewhere. At this point in the code you should not have jumps
with a null JUMP_LABEL. You need to do more digging here.
jeff
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: bug in new ia32 backend
@ 1999-06-22 12:12 Mike Stump
0 siblings, 0 replies; 16+ messages in thread
From: Mike Stump @ 1999-06-22 12:12 UTC (permalink / raw)
To: rth, toor; +Cc: egcs-bugs
> From: "John S. Dyson" <toor@dyson.iquest.net>
> To: rth@cygnus.com (Richard Henderson)
> Date: Tue, 22 Jun 1999 14:08:39 -0500 (EST)
> Cc: mrs@wrs.com, egcs-bugs@egcs.cygnus.com
> FWIW, when running on my SMP PPro system, the new EGCS/ia32 stuff
> is significantly faster when running my simple set of benchmarks.
:-) Glad to hear it... We'd love to hear exact numbers from a nice
diverse set of benchmarks. FP, int, control, matrix...
Love to hear about things that are slower, as well.
>From gvwilson@nevex.com Tue Jun 22 12:31:00 1999
From: <gvwilson@nevex.com>
To: egcs-bugs@egcs.cygnus.com
Subject: fatal error (2nd try)
Date: Tue, 22 Jun 1999 12:31:00 -0000
Message-id: <Pine.LNX.4.10.9906221529010.2059-101000@akbar.nevex.com>
X-SW-Source: 1999-06/msg00708.html
Content-length: 317
Hi again. I tried to submit a fatal error earlier today, but your mailer
bounced it (file size > 100000 bytes). I'm attaching a gzip'd tar file
with the .cpp, the main .h, the .ii, and the .s. The code comes from the
open source 3D graphics library VTK (at www.kitware.com). I'm using EGCS
2.93.22.
Thanks,
Greg
>From hamiltok@cs.uregina.ca Tue Jun 22 12:48:00 1999
From: Kendrick Hamilton <hamiltok@cs.uregina.ca>
To: egcs-bugs@egcs.cygnus.com
Subject: Bug trying to compile a C++ program with libjpeg
Date: Tue, 22 Jun 1999 12:48:00 -0000
Message-id: <376FE8A4.BF3534AC@cs.uregina.ca>
X-SW-Source: 1999-06/msg00709.html
Content-length: 313
I am trying to use egcs to compile a program that uses libjpeg. The
compile command I am using is:
g++ -v --save-temps -ljpeg *.cpp
I have attached all the files in the directory. I am using egcs 1.1.2
with redhat Linux 6.0.
Do you know how to get this to link properly.
Kendrick Hamilton
hamiltok@cs.uregina.ca
>From toon@moene.indiv.nluug.nl Tue Jun 22 12:57:00 1999
From: Toon Moene <toon@moene.indiv.nluug.nl>
To: "John S. Dyson" <toor@dyson.iquest.net>
Cc: Richard Henderson <rth@cygnus.com>, mrs@wrs.com, egcs-bugs@egcs.cygnus.com
Subject: Re: bug in new ia32 backend
Date: Tue, 22 Jun 1999 12:57:00 -0000
Message-id: <376FEA61.88A0B9E4@moene.indiv.nluug.nl>
References: <199906221908.OAA04746@dyson.iquest.net>
X-SW-Source: 1999-06/msg00710.html
Content-length: 654
John S. Dyson wrote:
> FWIW, when running on my SMP PPro system, the new EGCS/ia32 stuff
> is significantly faster when running my simple set of benchmarks.
> I sometimes use spice (circuit analysis), and if I get a chance,
> I'll try to provide some feedback on the behavior. So far, the
> stuff looks alot like what has been needed on the ia32 for a
> long, long time.
Doesn't sound like a bug to me (see subject :-)
Is that F spice or C spice ?
Cheers,
--
Toon Moene (toon@moene.indiv.nluug.nl)
Saturnushof 14, 3738 XG Maartensdijk, The Netherlands
Phone: +31 346 214290; Fax: +31 346 214286
GNU Fortran: http://world.std.com/~burley/g77.html
>From toor@dyson.iquest.net Tue Jun 22 13:59:00 1999
From: "John S. Dyson" <toor@dyson.iquest.net>
To: toon@moene.indiv.nluug.nl (Toon Moene)
Cc: rth@cygnus.com, mrs@wrs.com, egcs-bugs@egcs.cygnus.com
Subject: Kudos about ia32 stuff so far.
Date: Tue, 22 Jun 1999 13:59:00 -0000
Message-id: <199906222059.PAA04921@dyson.iquest.net>
References: <376FEA61.88A0B9E4@moene.indiv.nluug.nl>
X-SW-Source: 1999-06/msg00711.html
Content-length: 1334
> John S. Dyson wrote:
>
> > FWIW, when running on my SMP PPro system, the new EGCS/ia32 stuff
> > is significantly faster when running my simple set of benchmarks.
> > I sometimes use spice (circuit analysis), and if I get a chance,
> > I'll try to provide some feedback on the behavior. So far, the
> > stuff looks alot like what has been needed on the ia32 for a
> > long, long time.
>
> Doesn't sound like a bug to me (see subject :-)
>
Sorry, I am not always good at etiquette!!! (I changed
the subject!!!)
>
> Is that F spice or C spice ?
>
Because I am so cheap, I use both spice2g6 (fspice) and
spice3f5 (cspice.) When fspice doesn't appear to work
well (usually because of feature issues), I try cspice. I
would much rather use Aplac, but at those prices, I
could purchase another machine.
So, my plan is to compile and try fspice first with the ia32
changes, and later play with cspice. (Note that I preprocess
the source with f2c for now, because of the way that it is
set-up, but plan to try g77 later on.) It might eventually be
interesting to do a comparison between f2c/egcs(with ia32
improvements) and g77 with ia32 improvements.
So, my first try will be to compare gcc/egcs-current and gcc/egcs
with the ia32 stuff. Tonight, I have a deadline for work, but
will try to do it tonight or tomorrow.
John
>From zack@rabi.columbia.edu Tue Jun 22 18:49:00 1999
From: Zack Weinberg <zack@rabi.columbia.edu>
To: egcs-bugs@egcs.cygnus.com
Subject: Still loop.c problems with Joern's patch
Date: Tue, 22 Jun 1999 18:49:00 -0000
Message-id: <199906230148.VAA04098@blastula.phys.columbia.edu>
X-SW-Source: 1999-06/msg00712.html
Content-length: 78791
On x86, with current CVS plus Joern's patch for loop.c
( http://egcs.cygnus.com/ml/egcs-bugs/1999-06/msg00695.html ) regclass.c
compiles. but I get a bootstrap comparison failure on jcf-write.o. I'm not
good enough with x86 assembly to figure out what happened.
Here's the diff. The complete disassembly dumps are too big for the mailing
list; contact me directly if you want them.
(This is objdump --disassemble --reloc on the .o files, incidentally.)
zw
--- jcfw2.s Tue Jun 22 10:37:14 1999
+++ jcfw3.s Tue Jun 22 10:37:06 1999
@@ -1,5 +1,5 @@
-stage2/java/jcf-write.o: file format elf32-i386
+java/jcf-write.o: file format elf32-i386
Disassembly of section .text:
@@ -7155,7 +7155,7 @@
471b: 8b 55 08 movl 0x8(%ebp),%edx
471e: 83 c4 10 addl $0x10,%esp
4721: 8b 52 3c movl 0x3c(%edx),%edx
- 4724: e9 2b 07 00 00 jmp 4e54 <generate_classfile+0xa70>
+ 4724: e9 3b 07 00 00 jmp 4e64 <generate_classfile+0xa80>
4729: 8d b4 26 00 00 leal 0x0(%esi,1),%esi
472e: 00 00
4730: 8b 4d e8 movl 0xffffffe8(%ebp),%ecx
@@ -7253,7 +7253,7 @@
480f: 40 incl %eax
4810: 89 45 b0 movl %eax,0xffffffb0(%ebp)
4813: 83 7d dc 00 cmpl $0x0,0xffffffdc(%ebp)
- 4817: 0f 84 44 05 00 je 4d61 <generate_classfile+0x97d>
+ 4817: 0f 84 54 05 00 je 4d71 <generate_classfile+0x98d>
481c: 00
481d: c7 45 d0 00 00 movl $0x0,0xffffffd0(%ebp)
4822: 00 00
@@ -7484,11 +7484,11 @@
4a5b: 89 4d a8 movl %ecx,0xffffffa8(%ebp)
4a5e: c1 7d a8 08 sarl $0x8,0xffffffa8(%ebp)
4a62: 85 db testl %ebx,%ebx
- 4a64: 0f 84 89 00 00 je 4af3 <generate_classfile+0x70f>
+ 4a64: 0f 84 99 00 00 je 4b03 <generate_classfile+0x71f>
4a69: 00
4a6a: 8d 7e 02 leal 0x2(%esi),%edi
- 4a6d: 8d 46 0b leal 0xb(%esi),%eax
- 4a70: 89 45 a0 movl %eax,0xffffffa0(%ebp)
+ 4a6d: 8d 46 08 leal 0x8(%esi),%eax
+ 4a70: 89 45 9c movl %eax,0xffffff9c(%ebp)
4a73: 83 c6 07 addl $0x7,%esi
4a76: 8b 43 04 movl 0x4(%ebx),%eax
4a79: 8b 40 04 movl 0x4(%eax),%eax
@@ -7498,835 +7498,839 @@
4a85: 8a 40 04 movb 0x4(%eax),%al
4a88: 88 46 fa movb %al,0xfffffffa(%esi)
4a8b: 8b 43 08 movl 0x8(%ebx),%eax
- 4a8e: 8b 40 04 movl 0x4(%eax),%eax
- 4a91: c1 f8 08 sarl $0x8,%eax
- 4a94: 88 07 movb %al,(%edi)
- 4a96: 8b 43 08 movl 0x8(%ebx),%eax
- 4a99: 8a 40 04 movb 0x4(%eax),%al
- 4a9c: 88 47 01 movb %al,0x1(%edi)
- 4a9f: 8b 43 0c movl 0xc(%ebx),%eax
- 4aa2: 8b 40 04 movl 0x4(%eax),%eax
- 4aa5: c1 f8 08 sarl $0x8,%eax
- 4aa8: 88 47 02 movb %al,0x2(%edi)
- 4aab: 8b 43 0c movl 0xc(%ebx),%eax
- 4aae: 8b 55 a0 movl 0xffffffa0(%ebp),%edx
- 4ab1: 8a 40 04 movb 0x4(%eax),%al
- 4ab4: 88 42 fa movb %al,0xfffffffa(%edx)
- 4ab7: 8b 43 10 movl 0x10(%ebx),%eax
- 4aba: 85 c0 testl %eax,%eax
- 4abc: 75 04 jne 4ac2 <generate_classfile+0x6de>
- 4abe: 31 d2 xorl %edx,%edx
- 4ac0: eb 12 jmp 4ad4 <generate_classfile+0x6f0>
- 4ac2: 83 c4 f8 addl $0xfffffff8,%esp
- 4ac5: 50 pushl %eax
- 4ac6: 8b 4d ac movl 0xffffffac(%ebp),%ecx
- 4ac9: 51 pushl %ecx
- 4aca: e8 fc ff ff ff call 4acb <generate_classfile+0x6e7>
- 4acb: R_386_PC32 find_class_constant
- 4acf: 89 c2 movl %eax,%edx
- 4ad1: 83 c4 10 addl $0x10,%esp
- 4ad4: 8b 4d a0 movl 0xffffffa0(%ebp),%ecx
- 4ad7: 89 d0 movl %edx,%eax
- 4ad9: c1 f8 08 sarl $0x8,%eax
- 4adc: 88 41 fb movb %al,0xfffffffb(%ecx)
- 4adf: 88 16 movb %dl,(%esi)
- 4ae1: 83 c1 08 addl $0x8,%ecx
- 4ae4: 89 4d a0 movl %ecx,0xffffffa0(%ebp)
- 4ae7: 8b 1b movl (%ebx),%ebx
- 4ae9: 83 c6 08 addl $0x8,%esi
- 4aec: 83 c7 08 addl $0x8,%edi
- 4aef: 85 db testl %ebx,%ebx
- 4af1: 75 83 jne 4a76 <generate_classfile+0x692>
- 4af3: 8b 45 0c movl 0xc(%ebp),%eax
- 4af6: 83 c4 fc addl $0xfffffffc,%esp
- 4af9: 50 pushl %eax
- 4afa: 6a 02 pushl $0x2
- 4afc: 6a 00 pushl $0x0
- 4afe: e8 f5 b5 ff ff call f8 <append_chunk>
- 4b03: 89 c6 movl %eax,%esi
- 4b05: 8a 55 a8 movb 0xffffffa8(%ebp),%dl
- 4b08: 88 16 movb %dl,(%esi)
- 4b0a: 8a 4d d0 movb 0xffffffd0(%ebp),%cl
- 4b0d: 88 4e 01 movb %cl,0x1(%esi)
- 4b10: 8b 55 0c movl 0xc(%ebp),%edx
- 4b13: 83 c4 10 addl $0x10,%esp
- 4b16: 8b 42 34 movl 0x34(%edx),%eax
- 4b19: 85 c0 testl %eax,%eax
- 4b1b: 0f 8e c6 00 00 jle 4be7 <generate_classfile+0x803>
- 4b20: 00
- 4b21: 83 c4 fc addl $0xfffffffc,%esp
- 4b24: 52 pushl %edx
- 4b25: 8d 04 85 08 00 leal 0x8(,%eax,4),%eax
- 4b2a: 00 00
- 4b2c: 50 pushl %eax
- 4b2d: 6a 00 pushl $0x0
- 4b2f: e8 c4 b5 ff ff call f8 <append_chunk>
- 4b34: 89 c6 movl %eax,%esi
- 4b36: 83 c4 10 addl $0x10,%esp
- 4b39: 83 3d 10 00 00 cmpl $0x0,0x10
- 4b3e: 00 00
- 4b3b: R_386_32 .data
- 4b40: 75 15 jne 4b57 <generate_classfile+0x773>
- 4b42: 83 c4 f4 addl $0xfffffff4,%esp
- 4b45: 68 cb 06 00 00 pushl $0x6cb
- 4b46: R_386_32 .rodata
- 4b4a: e8 fc ff ff ff call 4b4b <generate_classfile+0x767>
- 4b4b: R_386_PC32 get_identifier
- 4b4f: a3 10 00 00 00 movl %eax,0x10
- 4b50: R_386_32 .data
- 4b54: 83 c4 10 addl $0x10,%esp
- 4b57: a1 10 00 00 00 movl 0x10,%eax
- 4b58: R_386_32 .data
- 4b5c: 83 c4 f8 addl $0xfffffff8,%esp
- 4b5f: 50 pushl %eax
- 4b60: 8b 4d ac movl 0xffffffac(%ebp),%ecx
- 4b63: 51 pushl %ecx
- 4b64: e8 fc ff ff ff call 4b65 <generate_classfile+0x781>
- 4b65: R_386_PC32 find_utf8_constant
- 4b69: 89 c7 movl %eax,%edi
- 4b6b: c1 f8 08 sarl $0x8,%eax
- 4b6e: 88 06 movb %al,(%esi)
- 4b70: 46 incl %esi
- 4b71: 89 f8 movl %edi,%eax
- 4b73: 88 06 movb %al,(%esi)
- 4b75: 8b 55 0c movl 0xc(%ebp),%edx
- 4b78: 46 incl %esi
- 4b79: 8b 42 34 movl 0x34(%edx),%eax
- 4b7c: c1 e0 02 shll $0x2,%eax
- 4b7f: 8d 78 02 leal 0x2(%eax),%edi
- 4b82: 89 fa movl %edi,%edx
- 4b84: c1 fa 10 sarl $0x10,%edx
- 4b87: 89 f8 movl %edi,%eax
- 4b89: c1 f8 18 sarl $0x18,%eax
- 4b8c: 88 06 movb %al,(%esi)
- 4b8e: 46 incl %esi
- 4b8f: 88 16 movb %dl,(%esi)
- 4b91: 46 incl %esi
- 4b92: 89 f8 movl %edi,%eax
- 4b94: c1 e8 08 shrl $0x8,%eax
- 4b97: 88 06 movb %al,(%esi)
- 4b99: 46 incl %esi
- 4b9a: 89 f9 movl %edi,%ecx
- 4b9c: 88 0e movb %cl,(%esi)
- 4b9e: 8b 45 0c movl 0xc(%ebp),%eax
+ 4a8e: 8b 55 9c movl 0xffffff9c(%ebp),%edx
+ 4a91: 8b 40 04 movl 0x4(%eax),%eax
+ 4a94: c1 f8 08 sarl $0x8,%eax
+ 4a97: 88 42 fa movb %al,0xfffffffa(%edx)
+ 4a9a: 8b 43 08 movl 0x8(%ebx),%eax
+ 4a9d: 8a 40 04 movb 0x4(%eax),%al
+ 4aa0: 88 47 01 movb %al,0x1(%edi)
+ 4aa3: 8b 43 0c movl 0xc(%ebx),%eax
+ 4aa6: 8b 40 04 movl 0x4(%eax),%eax
+ 4aa9: c1 f8 08 sarl $0x8,%eax
+ 4aac: 88 47 02 movb %al,0x2(%edi)
+ 4aaf: 8b 43 0c movl 0xc(%ebx),%eax
+ 4ab2: 83 c2 03 addl $0x3,%edx
+ 4ab5: 8a 40 04 movb 0x4(%eax),%al
+ 4ab8: 88 47 03 movb %al,0x3(%edi)
+ 4abb: 89 55 a0 movl %edx,0xffffffa0(%ebp)
+ 4abe: 8b 43 10 movl 0x10(%ebx),%eax
+ 4ac1: 85 c0 testl %eax,%eax
+ 4ac3: 75 0b jne 4ad0 <generate_classfile+0x6ec>
+ 4ac5: 31 d2 xorl %edx,%edx
+ 4ac7: eb 19 jmp 4ae2 <generate_classfile+0x6fe>
+ 4ac9: 8d b4 26 00 00 leal 0x0(%esi,1),%esi
+ 4ace: 00 00
+ 4ad0: 83 c4 f8 addl $0xfffffff8,%esp
+ 4ad3: 50 pushl %eax
+ 4ad4: 8b 4d ac movl 0xffffffac(%ebp),%ecx
+ 4ad7: 51 pushl %ecx
+ 4ad8: e8 fc ff ff ff call 4ad9 <generate_classfile+0x6f5>
+ 4ad9: R_386_PC32 find_class_constant
+ 4add: 89 c2 movl %eax,%edx
+ 4adf: 83 c4 10 addl $0x10,%esp
+ 4ae2: 8b 4d a0 movl 0xffffffa0(%ebp),%ecx
+ 4ae5: 89 d0 movl %edx,%eax
+ 4ae7: c1 f8 08 sarl $0x8,%eax
+ 4aea: 88 41 fb movb %al,0xfffffffb(%ecx)
+ 4aed: 88 16 movb %dl,(%esi)
+ 4aef: 83 45 9c 08 addl $0x8,0xffffff9c(%ebp)
+ 4af3: 8b 1b movl (%ebx),%ebx
+ 4af5: 83 c6 08 addl $0x8,%esi
+ 4af8: 83 c7 08 addl $0x8,%edi
+ 4afb: 85 db testl %ebx,%ebx
+ 4afd: 0f 85 73 ff ff jne 4a76 <generate_classfile+0x692>
+ 4b02: ff
+ 4b03: 8b 45 0c movl 0xc(%ebp),%eax
+ 4b06: 83 c4 fc addl $0xfffffffc,%esp
+ 4b09: 50 pushl %eax
+ 4b0a: 6a 02 pushl $0x2
+ 4b0c: 6a 00 pushl $0x0
+ 4b0e: e8 e5 b5 ff ff call f8 <append_chunk>
+ 4b13: 89 c6 movl %eax,%esi
+ 4b15: 8a 55 a8 movb 0xffffffa8(%ebp),%dl
+ 4b18: 88 16 movb %dl,(%esi)
+ 4b1a: 8a 4d d0 movb 0xffffffd0(%ebp),%cl
+ 4b1d: 88 4e 01 movb %cl,0x1(%esi)
+ 4b20: 8b 55 0c movl 0xc(%ebp),%edx
+ 4b23: 83 c4 10 addl $0x10,%esp
+ 4b26: 8b 42 34 movl 0x34(%edx),%eax
+ 4b29: 85 c0 testl %eax,%eax
+ 4b2b: 0f 8e c6 00 00 jle 4bf7 <generate_classfile+0x813>
+ 4b30: 00
+ 4b31: 83 c4 fc addl $0xfffffffc,%esp
+ 4b34: 52 pushl %edx
+ 4b35: 8d 04 85 08 00 leal 0x8(,%eax,4),%eax
+ 4b3a: 00 00
+ 4b3c: 50 pushl %eax
+ 4b3d: 6a 00 pushl $0x0
+ 4b3f: e8 b4 b5 ff ff call f8 <append_chunk>
+ 4b44: 89 c6 movl %eax,%esi
+ 4b46: 83 c4 10 addl $0x10,%esp
+ 4b49: 83 3d 10 00 00 cmpl $0x0,0x10
+ 4b4e: 00 00
+ 4b4b: R_386_32 .data
+ 4b50: 75 15 jne 4b67 <generate_classfile+0x783>
+ 4b52: 83 c4 f4 addl $0xfffffff4,%esp
+ 4b55: 68 cb 06 00 00 pushl $0x6cb
+ 4b56: R_386_32 .rodata
+ 4b5a: e8 fc ff ff ff call 4b5b <generate_classfile+0x777>
+ 4b5b: R_386_PC32 get_identifier
+ 4b5f: a3 10 00 00 00 movl %eax,0x10
+ 4b60: R_386_32 .data
+ 4b64: 83 c4 10 addl $0x10,%esp
+ 4b67: a1 10 00 00 00 movl 0x10,%eax
+ 4b68: R_386_32 .data
+ 4b6c: 83 c4 f8 addl $0xfffffff8,%esp
+ 4b6f: 50 pushl %eax
+ 4b70: 8b 4d ac movl 0xffffffac(%ebp),%ecx
+ 4b73: 51 pushl %ecx
+ 4b74: e8 fc ff ff ff call 4b75 <generate_classfile+0x791>
+ 4b75: R_386_PC32 find_utf8_constant
+ 4b79: 89 c7 movl %eax,%edi
+ 4b7b: c1 f8 08 sarl $0x8,%eax
+ 4b7e: 88 06 movb %al,(%esi)
+ 4b80: 46 incl %esi
+ 4b81: 89 f8 movl %edi,%eax
+ 4b83: 88 06 movb %al,(%esi)
+ 4b85: 8b 55 0c movl 0xc(%ebp),%edx
+ 4b88: 46 incl %esi
+ 4b89: 8b 42 34 movl 0x34(%edx),%eax
+ 4b8c: c1 e0 02 shll $0x2,%eax
+ 4b8f: 8d 78 02 leal 0x2(%eax),%edi
+ 4b92: 89 fa movl %edi,%edx
+ 4b94: c1 fa 10 sarl $0x10,%edx
+ 4b97: 89 f8 movl %edi,%eax
+ 4b99: c1 f8 18 sarl $0x18,%eax
+ 4b9c: 88 06 movb %al,(%esi)
+ 4b9e: 46 incl %esi
+ 4b9f: 88 16 movb %dl,(%esi)
4ba1: 46 incl %esi
- 4ba2: 8b 78 34 movl 0x34(%eax),%edi
- 4ba5: 89 f8 movl %edi,%eax
- 4ba7: c1 f8 08 sarl $0x8,%eax
- 4baa: 88 06 movb %al,(%esi)
- 4bac: 46 incl %esi
- 4bad: 89 fa movl %edi,%edx
- 4baf: 88 16 movb %dl,(%esi)
- 4bb1: 8b 4d 0c movl 0xc(%ebp),%ecx
- 4bb4: 83 c4 10 addl $0x10,%esp
- 4bb7: 46 incl %esi
- 4bb8: 8b 51 10 movl 0x10(%ecx),%edx
- 4bbb: 85 d2 testl %edx,%edx
- 4bbd: 74 28 je 4be7 <generate_classfile+0x803>
- 4bbf: 90 nop
- 4bc0: 8b 4a 08 movl 0x8(%edx),%ecx
- 4bc3: 85 c9 testl %ecx,%ecx
- 4bc5: 7e 1a jle 4be1 <generate_classfile+0x7fd>
- 4bc7: 8b 42 04 movl 0x4(%edx),%eax
- 4bca: c1 f8 08 sarl $0x8,%eax
- 4bcd: 88 06 movb %al,(%esi)
- 4bcf: 46 incl %esi
- 4bd0: 8a 42 04 movb 0x4(%edx),%al
- 4bd3: 88 06 movb %al,(%esi)
- 4bd5: 46 incl %esi
- 4bd6: 89 c8 movl %ecx,%eax
- 4bd8: c1 f8 08 sarl $0x8,%eax
- 4bdb: 88 06 movb %al,(%esi)
- 4bdd: 46 incl %esi
- 4bde: 88 0e movb %cl,(%esi)
- 4be0: 46 incl %esi
- 4be1: 8b 12 movl (%edx),%edx
- 4be3: 85 d2 testl %edx,%edx
- 4be5: 75 d9 jne 4bc0 <generate_classfile+0x7dc>
- 4be7: 8b 55 0c movl 0xc(%ebp),%edx
- 4bea: 8b 42 20 movl 0x20(%edx),%eax
- 4bed: 85 c0 testl %eax,%eax
- 4bef: 0f 8e 6c 01 00 jle 4d61 <generate_classfile+0x97d>
- 4bf4: 00
- 4bf5: 8b 4a 18 movl 0x18(%edx),%ecx
- 4bf8: 89 4d c8 movl %ecx,0xffffffc8(%ebp)
- 4bfb: 83 c4 fc addl $0xfffffffc,%esp
- 4bfe: 52 pushl %edx
- 4bff: 8d 04 80 leal (%eax,%eax,4),%eax
- 4c02: 8d 04 45 08 00 leal 0x8(,%eax,2),%eax
- 4c07: 00 00
- 4c09: 50 pushl %eax
- 4c0a: 6a 00 pushl $0x0
- 4c0c: e8 e7 b4 ff ff call f8 <append_chunk>
- 4c11: 89 c6 movl %eax,%esi
- 4c13: 83 c4 10 addl $0x10,%esp
- 4c16: 83 3d 14 00 00 cmpl $0x0,0x14
- 4c1b: 00 00
- 4c18: R_386_32 .data
- 4c1d: 75 15 jne 4c34 <generate_classfile+0x850>
- 4c1f: 83 c4 f4 addl $0xfffffff4,%esp
- 4c22: 68 db 06 00 00 pushl $0x6db
- 4c23: R_386_32 .rodata
- 4c27: e8 fc ff ff ff call 4c28 <generate_classfile+0x844>
- 4c28: R_386_PC32 get_identifier
- 4c2c: a3 14 00 00 00 movl %eax,0x14
- 4c2d: R_386_32 .data
- 4c31: 83 c4 10 addl $0x10,%esp
- 4c34: a1 14 00 00 00 movl 0x14,%eax
- 4c35: R_386_32 .data
- 4c39: 83 c4 f8 addl $0xfffffff8,%esp
- 4c3c: 50 pushl %eax
- 4c3d: 8b 45 ac movl 0xffffffac(%ebp),%eax
- 4c40: 50 pushl %eax
- 4c41: e8 fc ff ff ff call 4c42 <generate_classfile+0x85e>
- 4c42: R_386_PC32 find_utf8_constant
- 4c46: 89 c7 movl %eax,%edi
- 4c48: c1 f8 08 sarl $0x8,%eax
- 4c4b: 88 06 movb %al,(%esi)
- 4c4d: 46 incl %esi
- 4c4e: 89 fa movl %edi,%edx
- 4c50: 88 16 movb %dl,(%esi)
- 4c52: 8b 4d 0c movl 0xc(%ebp),%ecx
- 4c55: 46 incl %esi
- 4c56: 83 c4 10 addl $0x10,%esp
- 4c59: 8b 41 20 movl 0x20(%ecx),%eax
- 4c5c: 8d 04 80 leal (%eax,%eax,4),%eax
- 4c5f: 8d 3c 45 02 00 leal 0x2(,%eax,2),%edi
- 4c64: 00 00
- 4c66: 89 fa movl %edi,%edx
- 4c68: c1 fa 10 sarl $0x10,%edx
- 4c6b: 89 f8 movl %edi,%eax
- 4c6d: c1 f8 18 sarl $0x18,%eax
- 4c70: 88 06 movb %al,(%esi)
- 4c72: 46 incl %esi
- 4c73: 88 16 movb %dl,(%esi)
- 4c75: 46 incl %esi
- 4c76: 89 f8 movl %edi,%eax
- 4c78: c1 e8 08 shrl $0x8,%eax
- 4c7b: 88 06 movb %al,(%esi)
- 4c7d: 46 incl %esi
- 4c7e: 89 f8 movl %edi,%eax
+ 4ba2: 89 f8 movl %edi,%eax
+ 4ba4: c1 e8 08 shrl $0x8,%eax
+ 4ba7: 88 06 movb %al,(%esi)
+ 4ba9: 46 incl %esi
+ 4baa: 89 f9 movl %edi,%ecx
+ 4bac: 88 0e movb %cl,(%esi)
+ 4bae: 8b 45 0c movl 0xc(%ebp),%eax
+ 4bb1: 46 incl %esi
+ 4bb2: 8b 78 34 movl 0x34(%eax),%edi
+ 4bb5: 89 f8 movl %edi,%eax
+ 4bb7: c1 f8 08 sarl $0x8,%eax
+ 4bba: 88 06 movb %al,(%esi)
+ 4bbc: 46 incl %esi
+ 4bbd: 89 fa movl %edi,%edx
+ 4bbf: 88 16 movb %dl,(%esi)
+ 4bc1: 8b 4d 0c movl 0xc(%ebp),%ecx
+ 4bc4: 83 c4 10 addl $0x10,%esp
+ 4bc7: 46 incl %esi
+ 4bc8: 8b 51 10 movl 0x10(%ecx),%edx
+ 4bcb: 85 d2 testl %edx,%edx
+ 4bcd: 74 28 je 4bf7 <generate_classfile+0x813>
+ 4bcf: 90 nop
+ 4bd0: 8b 4a 08 movl 0x8(%edx),%ecx
+ 4bd3: 85 c9 testl %ecx,%ecx
+ 4bd5: 7e 1a jle 4bf1 <generate_classfile+0x80d>
+ 4bd7: 8b 42 04 movl 0x4(%edx),%eax
+ 4bda: c1 f8 08 sarl $0x8,%eax
+ 4bdd: 88 06 movb %al,(%esi)
+ 4bdf: 46 incl %esi
+ 4be0: 8a 42 04 movb 0x4(%edx),%al
+ 4be3: 88 06 movb %al,(%esi)
+ 4be5: 46 incl %esi
+ 4be6: 89 c8 movl %ecx,%eax
+ 4be8: c1 f8 08 sarl $0x8,%eax
+ 4beb: 88 06 movb %al,(%esi)
+ 4bed: 46 incl %esi
+ 4bee: 88 0e movb %cl,(%esi)
+ 4bf0: 46 incl %esi
+ 4bf1: 8b 12 movl (%edx),%edx
+ 4bf3: 85 d2 testl %edx,%edx
+ 4bf5: 75 d9 jne 4bd0 <generate_classfile+0x7ec>
+ 4bf7: 8b 55 0c movl 0xc(%ebp),%edx
+ 4bfa: 8b 42 20 movl 0x20(%edx),%eax
+ 4bfd: 85 c0 testl %eax,%eax
+ 4bff: 0f 8e 6c 01 00 jle 4d71 <generate_classfile+0x98d>
+ 4c04: 00
+ 4c05: 8b 4a 18 movl 0x18(%edx),%ecx
+ 4c08: 89 4d c8 movl %ecx,0xffffffc8(%ebp)
+ 4c0b: 83 c4 fc addl $0xfffffffc,%esp
+ 4c0e: 52 pushl %edx
+ 4c0f: 8d 04 80 leal (%eax,%eax,4),%eax
+ 4c12: 8d 04 45 08 00 leal 0x8(,%eax,2),%eax
+ 4c17: 00 00
+ 4c19: 50 pushl %eax
+ 4c1a: 6a 00 pushl $0x0
+ 4c1c: e8 d7 b4 ff ff call f8 <append_chunk>
+ 4c21: 89 c6 movl %eax,%esi
+ 4c23: 83 c4 10 addl $0x10,%esp
+ 4c26: 83 3d 14 00 00 cmpl $0x0,0x14
+ 4c2b: 00 00
+ 4c28: R_386_32 .data
+ 4c2d: 75 15 jne 4c44 <generate_classfile+0x860>
+ 4c2f: 83 c4 f4 addl $0xfffffff4,%esp
+ 4c32: 68 db 06 00 00 pushl $0x6db
+ 4c33: R_386_32 .rodata
+ 4c37: e8 fc ff ff ff call 4c38 <generate_classfile+0x854>
+ 4c38: R_386_PC32 get_identifier
+ 4c3c: a3 14 00 00 00 movl %eax,0x14
+ 4c3d: R_386_32 .data
+ 4c41: 83 c4 10 addl $0x10,%esp
+ 4c44: a1 14 00 00 00 movl 0x14,%eax
+ 4c45: R_386_32 .data
+ 4c49: 83 c4 f8 addl $0xfffffff8,%esp
+ 4c4c: 50 pushl %eax
+ 4c4d: 8b 45 ac movl 0xffffffac(%ebp),%eax
+ 4c50: 50 pushl %eax
+ 4c51: e8 fc ff ff ff call 4c52 <generate_classfile+0x86e>
+ 4c52: R_386_PC32 find_utf8_constant
+ 4c56: 89 c7 movl %eax,%edi
+ 4c58: c1 f8 08 sarl $0x8,%eax
+ 4c5b: 88 06 movb %al,(%esi)
+ 4c5d: 46 incl %esi
+ 4c5e: 89 fa movl %edi,%edx
+ 4c60: 88 16 movb %dl,(%esi)
+ 4c62: 8b 4d 0c movl 0xc(%ebp),%ecx
+ 4c65: 46 incl %esi
+ 4c66: 83 c4 10 addl $0x10,%esp
+ 4c69: 8b 41 20 movl 0x20(%ecx),%eax
+ 4c6c: 8d 04 80 leal (%eax,%eax,4),%eax
+ 4c6f: 8d 3c 45 02 00 leal 0x2(,%eax,2),%edi
+ 4c74: 00 00
+ 4c76: 89 fa movl %edi,%edx
+ 4c78: c1 fa 10 sarl $0x10,%edx
+ 4c7b: 89 f8 movl %edi,%eax
+ 4c7d: c1 f8 18 sarl $0x18,%eax
4c80: 88 06 movb %al,(%esi)
- 4c82: 8b 79 20 movl 0x20(%ecx),%edi
+ 4c82: 46 incl %esi
+ 4c83: 88 16 movb %dl,(%esi)
4c85: 46 incl %esi
4c86: 89 f8 movl %edi,%eax
- 4c88: c1 f8 08 sarl $0x8,%eax
+ 4c88: c1 e8 08 shrl $0x8,%eax
4c8b: 88 06 movb %al,(%esi)
4c8d: 46 incl %esi
- 4c8e: 89 fa movl %edi,%edx
- 4c90: 88 16 movb %dl,(%esi)
- 4c92: 46 incl %esi
- 4c93: 83 7d c8 00 cmpl $0x0,0xffffffc8(%ebp)
- 4c97: 0f 84 c4 00 00 je 4d61 <generate_classfile+0x97d>
- 4c9c: 00
- 4c9d: 8b 4d ac movl 0xffffffac(%ebp),%ecx
- 4ca0: 89 4d c0 movl %ecx,0xffffffc0(%ebp)
- 4ca3: 83 c6 02 addl $0x2,%esi
- 4ca6: 89 75 a4 movl %esi,0xffffffa4(%ebp)
- 4ca9: 8d b4 26 00 00 leal 0x0(%esi,1),%esi
- 4cae: 00 00
- 4cb0: 8b 55 c8 movl 0xffffffc8(%ebp),%edx
- 4cb3: 8b 42 04 movl 0x4(%edx),%eax
- 4cb6: 83 c4 f4 addl $0xfffffff4,%esp
- 4cb9: 8b 58 28 movl 0x28(%eax),%ebx
- 4cbc: 8b 40 04 movl 0x4(%eax),%eax
- 4cbf: 50 pushl %eax
- 4cc0: e8 fc ff ff ff call 4cc1 <generate_classfile+0x8dd>
- 4cc1: R_386_PC32 build_java_signature
- 4cc5: 8b 4d c8 movl 0xffffffc8(%ebp),%ecx
- 4cc8: 89 45 c4 movl %eax,0xffffffc4(%ebp)
- 4ccb: 8b 41 08 movl 0x8(%ecx),%eax
- 4cce: 8b 78 04 movl 0x4(%eax),%edi
- 4cd1: 89 f8 movl %edi,%eax
- 4cd3: c1 f8 08 sarl $0x8,%eax
- 4cd6: 88 46 fe movb %al,0xfffffffe(%esi)
- 4cd9: 89 f8 movl %edi,%eax
- 4cdb: 88 46 ff movb %al,0xffffffff(%esi)
- 4cde: 8b 41 0c movl 0xc(%ecx),%eax
- 4ce1: 83 c4 f8 addl $0xfffffff8,%esp
- 4ce4: 8b 55 a4 movl 0xffffffa4(%ebp),%edx
- 4ce7: 8b 40 04 movl 0x4(%eax),%eax
- 4cea: 29 f8 subl %edi,%eax
- 4cec: 89 c7 movl %eax,%edi
- 4cee: c1 f8 08 sarl $0x8,%eax
- 4cf1: 88 02 movb %al,(%edx)
- 4cf3: 89 f9 movl %edi,%ecx
- 4cf5: 88 4e 01 movb %cl,0x1(%esi)
- 4cf8: 53 pushl %ebx
- 4cf9: 8b 45 c0 movl 0xffffffc0(%ebp),%eax
- 4cfc: 50 pushl %eax
- 4cfd: e8 fc ff ff ff call 4cfe <generate_classfile+0x91a>
- 4cfe: R_386_PC32 find_utf8_constant
- 4d02: 8b 55 a4 movl 0xffffffa4(%ebp),%edx
- 4d05: 89 c7 movl %eax,%edi
- 4d07: c1 f8 08 sarl $0x8,%eax
- 4d0a: 88 42 02 movb %al,0x2(%edx)
- 4d0d: 89 f9 movl %edi,%ecx
- 4d0f: 88 4e 03 movb %cl,0x3(%esi)
- 4d12: 8b 45 c4 movl 0xffffffc4(%ebp),%eax
- 4d15: 83 c4 20 addl $0x20,%esp
- 4d18: 83 c4 f8 addl $0xfffffff8,%esp
- 4d1b: 50 pushl %eax
- 4d1c: 8b 55 c0 movl 0xffffffc0(%ebp),%edx
- 4d1f: 52 pushl %edx
- 4d20: e8 fc ff ff ff call 4d21 <generate_classfile+0x93d>
- 4d21: R_386_PC32 find_utf8_constant
- 4d25: 8b 4d a4 movl 0xffffffa4(%ebp),%ecx
- 4d28: 89 c7 movl %eax,%edi
- 4d2a: c1 f8 08 sarl $0x8,%eax
- 4d2d: 88 41 04 movb %al,0x4(%ecx)
- 4d30: 89 f8 movl %edi,%eax
- 4d32: 88 46 05 movb %al,0x5(%esi)
- 4d35: 8b 55 c8 movl 0xffffffc8(%ebp),%edx
- 4d38: 8b 42 04 movl 0x4(%edx),%eax
- 4d3b: 83 c4 10 addl $0x10,%esp
- 4d3e: 8b 78 24 movl 0x24(%eax),%edi
- 4d41: 89 f8 movl %edi,%eax
- 4d43: c1 f8 08 sarl $0x8,%eax
- 4d46: 88 41 06 movb %al,0x6(%ecx)
- 4d49: 89 f9 movl %edi,%ecx
- 4d4b: 88 4e 07 movb %cl,0x7(%esi)
- 4d4e: 83 c6 0a addl $0xa,%esi
- 4d51: 89 75 a4 movl %esi,0xffffffa4(%ebp)
- 4d54: 8b 02 movl (%edx),%eax
- 4d56: 89 45 c8 movl %eax,0xffffffc8(%ebp)
- 4d59: 85 c0 testl %eax,%eax
- 4d5b: 0f 85 4f ff ff jne 4cb0 <generate_classfile+0x8cc>
- 4d60: ff
- 4d61: 8b 55 e8 movl 0xffffffe8(%ebp),%edx
- 4d64: 8b 42 60 movl 0x60(%edx),%eax
- 4d67: 8b 40 20 movl 0x20(%eax),%eax
- 4d6a: 85 c0 testl %eax,%eax
- 4d6c: 0f 84 cf 00 00 je 4e41 <generate_classfile+0xa5d>
- 4d71: 00
- 4d72: 89 45 bc movl %eax,0xffffffbc(%ebp)
- 4d75: 83 c4 f4 addl $0xfffffff4,%esp
- 4d78: 50 pushl %eax
- 4d79: e8 fc ff ff ff call 4d7a <generate_classfile+0x996>
- 4d7a: R_386_PC32 list_length
- 4d7e: 89 45 b8 movl %eax,0xffffffb8(%ebp)
- 4d81: 83 c4 10 addl $0x10,%esp
- 4d84: 83 3d 18 00 00 cmpl $0x0,0x18
- 4d89: 00 00
- 4d86: R_386_32 .data
- 4d8b: 75 15 jne 4da2 <generate_classfile+0x9be>
- 4d8d: 83 c4 f4 addl $0xfffffff4,%esp
- 4d90: 68 ee 06 00 00 pushl $0x6ee
- 4d91: R_386_32 .rodata
- 4d95: e8 fc ff ff ff call 4d96 <generate_classfile+0x9b2>
- 4d96: R_386_PC32 get_identifier
- 4d9a: a3 18 00 00 00 movl %eax,0x18
- 4d9b: R_386_32 .data
- 4d9f: 83 c4 10 addl $0x10,%esp
- 4da2: 8b 4d 0c movl 0xc(%ebp),%ecx
- 4da5: 83 c4 fc addl $0xfffffffc,%esp
- 4da8: 51 pushl %ecx
- 4da9: 8b 5d b8 movl 0xffffffb8(%ebp),%ebx
- 4dac: 01 db addl %ebx,%ebx
- 4dae: 8d 43 08 leal 0x8(%ebx),%eax
- 4db1: 50 pushl %eax
- 4db2: 6a 00 pushl $0x0
- 4db4: e8 3f b3 ff ff call f8 <append_chunk>
- 4db9: 89 c6 movl %eax,%esi
- 4dbb: a1 18 00 00 00 movl 0x18,%eax
- 4dbc: R_386_32 .data
- 4dc0: 83 c4 f8 addl $0xfffffff8,%esp
- 4dc3: 50 pushl %eax
- 4dc4: 8b 45 ac movl 0xffffffac(%ebp),%eax
- 4dc7: 50 pushl %eax
- 4dc8: e8 fc ff ff ff call 4dc9 <generate_classfile+0x9e5>
- 4dc9: R_386_PC32 find_utf8_constant
- 4dcd: 89 c7 movl %eax,%edi
- 4dcf: c1 f8 08 sarl $0x8,%eax
- 4dd2: 88 06 movb %al,(%esi)
- 4dd4: 46 incl %esi
- 4dd5: 89 fa movl %edi,%edx
- 4dd7: 88 16 movb %dl,(%esi)
- 4dd9: 46 incl %esi
- 4dda: 8d 7b 02 leal 0x2(%ebx),%edi
- 4ddd: 89 fa movl %edi,%edx
- 4ddf: c1 fa 10 sarl $0x10,%edx
- 4de2: 89 f8 movl %edi,%eax
- 4de4: c1 f8 18 sarl $0x18,%eax
- 4de7: 88 06 movb %al,(%esi)
+ 4c8e: 89 f8 movl %edi,%eax
+ 4c90: 88 06 movb %al,(%esi)
+ 4c92: 8b 79 20 movl 0x20(%ecx),%edi
+ 4c95: 46 incl %esi
+ 4c96: 89 f8 movl %edi,%eax
+ 4c98: c1 f8 08 sarl $0x8,%eax
+ 4c9b: 88 06 movb %al,(%esi)
+ 4c9d: 46 incl %esi
+ 4c9e: 89 fa movl %edi,%edx
+ 4ca0: 88 16 movb %dl,(%esi)
+ 4ca2: 46 incl %esi
+ 4ca3: 83 7d c8 00 cmpl $0x0,0xffffffc8(%ebp)
+ 4ca7: 0f 84 c4 00 00 je 4d71 <generate_classfile+0x98d>
+ 4cac: 00
+ 4cad: 8b 4d ac movl 0xffffffac(%ebp),%ecx
+ 4cb0: 89 4d c0 movl %ecx,0xffffffc0(%ebp)
+ 4cb3: 83 c6 02 addl $0x2,%esi
+ 4cb6: 89 75 a4 movl %esi,0xffffffa4(%ebp)
+ 4cb9: 8d b4 26 00 00 leal 0x0(%esi,1),%esi
+ 4cbe: 00 00
+ 4cc0: 8b 55 c8 movl 0xffffffc8(%ebp),%edx
+ 4cc3: 8b 42 04 movl 0x4(%edx),%eax
+ 4cc6: 83 c4 f4 addl $0xfffffff4,%esp
+ 4cc9: 8b 58 28 movl 0x28(%eax),%ebx
+ 4ccc: 8b 40 04 movl 0x4(%eax),%eax
+ 4ccf: 50 pushl %eax
+ 4cd0: e8 fc ff ff ff call 4cd1 <generate_classfile+0x8ed>
+ 4cd1: R_386_PC32 build_java_signature
+ 4cd5: 8b 4d c8 movl 0xffffffc8(%ebp),%ecx
+ 4cd8: 89 45 c4 movl %eax,0xffffffc4(%ebp)
+ 4cdb: 8b 41 08 movl 0x8(%ecx),%eax
+ 4cde: 8b 78 04 movl 0x4(%eax),%edi
+ 4ce1: 89 f8 movl %edi,%eax
+ 4ce3: c1 f8 08 sarl $0x8,%eax
+ 4ce6: 88 46 fe movb %al,0xfffffffe(%esi)
+ 4ce9: 89 f8 movl %edi,%eax
+ 4ceb: 88 46 ff movb %al,0xffffffff(%esi)
+ 4cee: 8b 41 0c movl 0xc(%ecx),%eax
+ 4cf1: 83 c4 f8 addl $0xfffffff8,%esp
+ 4cf4: 8b 55 a4 movl 0xffffffa4(%ebp),%edx
+ 4cf7: 8b 40 04 movl 0x4(%eax),%eax
+ 4cfa: 29 f8 subl %edi,%eax
+ 4cfc: 89 c7 movl %eax,%edi
+ 4cfe: c1 f8 08 sarl $0x8,%eax
+ 4d01: 88 02 movb %al,(%edx)
+ 4d03: 89 f9 movl %edi,%ecx
+ 4d05: 88 4e 01 movb %cl,0x1(%esi)
+ 4d08: 53 pushl %ebx
+ 4d09: 8b 45 c0 movl 0xffffffc0(%ebp),%eax
+ 4d0c: 50 pushl %eax
+ 4d0d: e8 fc ff ff ff call 4d0e <generate_classfile+0x92a>
+ 4d0e: R_386_PC32 find_utf8_constant
+ 4d12: 8b 55 a4 movl 0xffffffa4(%ebp),%edx
+ 4d15: 89 c7 movl %eax,%edi
+ 4d17: c1 f8 08 sarl $0x8,%eax
+ 4d1a: 88 42 02 movb %al,0x2(%edx)
+ 4d1d: 89 f9 movl %edi,%ecx
+ 4d1f: 88 4e 03 movb %cl,0x3(%esi)
+ 4d22: 8b 45 c4 movl 0xffffffc4(%ebp),%eax
+ 4d25: 83 c4 20 addl $0x20,%esp
+ 4d28: 83 c4 f8 addl $0xfffffff8,%esp
+ 4d2b: 50 pushl %eax
+ 4d2c: 8b 55 c0 movl 0xffffffc0(%ebp),%edx
+ 4d2f: 52 pushl %edx
+ 4d30: e8 fc ff ff ff call 4d31 <generate_classfile+0x94d>
+ 4d31: R_386_PC32 find_utf8_constant
+ 4d35: 8b 4d a4 movl 0xffffffa4(%ebp),%ecx
+ 4d38: 89 c7 movl %eax,%edi
+ 4d3a: c1 f8 08 sarl $0x8,%eax
+ 4d3d: 88 41 04 movb %al,0x4(%ecx)
+ 4d40: 89 f8 movl %edi,%eax
+ 4d42: 88 46 05 movb %al,0x5(%esi)
+ 4d45: 8b 55 c8 movl 0xffffffc8(%ebp),%edx
+ 4d48: 8b 42 04 movl 0x4(%edx),%eax
+ 4d4b: 83 c4 10 addl $0x10,%esp
+ 4d4e: 8b 78 24 movl 0x24(%eax),%edi
+ 4d51: 89 f8 movl %edi,%eax
+ 4d53: c1 f8 08 sarl $0x8,%eax
+ 4d56: 88 41 06 movb %al,0x6(%ecx)
+ 4d59: 89 f9 movl %edi,%ecx
+ 4d5b: 88 4e 07 movb %cl,0x7(%esi)
+ 4d5e: 83 c6 0a addl $0xa,%esi
+ 4d61: 89 75 a4 movl %esi,0xffffffa4(%ebp)
+ 4d64: 8b 02 movl (%edx),%eax
+ 4d66: 89 45 c8 movl %eax,0xffffffc8(%ebp)
+ 4d69: 85 c0 testl %eax,%eax
+ 4d6b: 0f 85 4f ff ff jne 4cc0 <generate_classfile+0x8dc>
+ 4d70: ff
+ 4d71: 8b 55 e8 movl 0xffffffe8(%ebp),%edx
+ 4d74: 8b 42 60 movl 0x60(%edx),%eax
+ 4d77: 8b 40 20 movl 0x20(%eax),%eax
+ 4d7a: 85 c0 testl %eax,%eax
+ 4d7c: 0f 84 cf 00 00 je 4e51 <generate_classfile+0xa6d>
+ 4d81: 00
+ 4d82: 89 45 bc movl %eax,0xffffffbc(%ebp)
+ 4d85: 83 c4 f4 addl $0xfffffff4,%esp
+ 4d88: 50 pushl %eax
+ 4d89: e8 fc ff ff ff call 4d8a <generate_classfile+0x9a6>
+ 4d8a: R_386_PC32 list_length
+ 4d8e: 89 45 b8 movl %eax,0xffffffb8(%ebp)
+ 4d91: 83 c4 10 addl $0x10,%esp
+ 4d94: 83 3d 18 00 00 cmpl $0x0,0x18
+ 4d99: 00 00
+ 4d96: R_386_32 .data
+ 4d9b: 75 15 jne 4db2 <generate_classfile+0x9ce>
+ 4d9d: 83 c4 f4 addl $0xfffffff4,%esp
+ 4da0: 68 ee 06 00 00 pushl $0x6ee
+ 4da1: R_386_32 .rodata
+ 4da5: e8 fc ff ff ff call 4da6 <generate_classfile+0x9c2>
+ 4da6: R_386_PC32 get_identifier
+ 4daa: a3 18 00 00 00 movl %eax,0x18
+ 4dab: R_386_32 .data
+ 4daf: 83 c4 10 addl $0x10,%esp
+ 4db2: 8b 4d 0c movl 0xc(%ebp),%ecx
+ 4db5: 83 c4 fc addl $0xfffffffc,%esp
+ 4db8: 51 pushl %ecx
+ 4db9: 8b 5d b8 movl 0xffffffb8(%ebp),%ebx
+ 4dbc: 01 db addl %ebx,%ebx
+ 4dbe: 8d 43 08 leal 0x8(%ebx),%eax
+ 4dc1: 50 pushl %eax
+ 4dc2: 6a 00 pushl $0x0
+ 4dc4: e8 2f b3 ff ff call f8 <append_chunk>
+ 4dc9: 89 c6 movl %eax,%esi
+ 4dcb: a1 18 00 00 00 movl 0x18,%eax
+ 4dcc: R_386_32 .data
+ 4dd0: 83 c4 f8 addl $0xfffffff8,%esp
+ 4dd3: 50 pushl %eax
+ 4dd4: 8b 45 ac movl 0xffffffac(%ebp),%eax
+ 4dd7: 50 pushl %eax
+ 4dd8: e8 fc ff ff ff call 4dd9 <generate_classfile+0x9f5>
+ 4dd9: R_386_PC32 find_utf8_constant
+ 4ddd: 89 c7 movl %eax,%edi
+ 4ddf: c1 f8 08 sarl $0x8,%eax
+ 4de2: 88 06 movb %al,(%esi)
+ 4de4: 46 incl %esi
+ 4de5: 89 fa movl %edi,%edx
+ 4de7: 88 16 movb %dl,(%esi)
4de9: 46 incl %esi
- 4dea: 88 16 movb %dl,(%esi)
- 4dec: 46 incl %esi
- 4ded: 89 f8 movl %edi,%eax
- 4def: c1 e8 08 shrl $0x8,%eax
- 4df2: 88 06 movb %al,(%esi)
- 4df4: 46 incl %esi
- 4df5: 89 f9 movl %edi,%ecx
- 4df7: 88 0e movb %cl,(%esi)
- 4df9: 8b 7d b8 movl 0xffffffb8(%ebp),%edi
+ 4dea: 8d 7b 02 leal 0x2(%ebx),%edi
+ 4ded: 89 fa movl %edi,%edx
+ 4def: c1 fa 10 sarl $0x10,%edx
+ 4df2: 89 f8 movl %edi,%eax
+ 4df4: c1 f8 18 sarl $0x18,%eax
+ 4df7: 88 06 movb %al,(%esi)
+ 4df9: 46 incl %esi
+ 4dfa: 88 16 movb %dl,(%esi)
4dfc: 46 incl %esi
4dfd: 89 f8 movl %edi,%eax
- 4dff: c1 f8 08 sarl $0x8,%eax
+ 4dff: c1 e8 08 shrl $0x8,%eax
4e02: 88 06 movb %al,(%esi)
4e04: 46 incl %esi
- 4e05: 89 f8 movl %edi,%eax
- 4e07: 88 06 movb %al,(%esi)
- 4e09: 46 incl %esi
- 4e0a: 83 c4 20 addl $0x20,%esp
- 4e0d: 8d 76 00 leal 0x0(%esi),%esi
- 4e10: 8b 55 bc movl 0xffffffbc(%ebp),%edx
- 4e13: 83 c4 f8 addl $0xfffffff8,%esp
- 4e16: 8b 42 10 movl 0x10(%edx),%eax
- 4e19: 50 pushl %eax
- 4e1a: 8b 4d ac movl 0xffffffac(%ebp),%ecx
- 4e1d: 51 pushl %ecx
- 4e1e: e8 fc ff ff ff call 4e1f <generate_classfile+0xa3b>
- 4e1f: R_386_PC32 find_class_constant
- 4e23: 89 c7 movl %eax,%edi
- 4e25: c1 f8 08 sarl $0x8,%eax
- 4e28: 88 06 movb %al,(%esi)
- 4e2a: 89 f8 movl %edi,%eax
- 4e2c: 88 46 01 movb %al,0x1(%esi)
- 4e2f: 8b 55 bc movl 0xffffffbc(%ebp),%edx
- 4e32: 83 c6 02 addl $0x2,%esi
- 4e35: 83 c4 10 addl $0x10,%esp
- 4e38: 8b 12 movl (%edx),%edx
- 4e3a: 89 55 bc movl %edx,0xffffffbc(%ebp)
- 4e3d: 85 d2 testl %edx,%edx
- 4e3f: 75 cf jne 4e10 <generate_classfile+0xa2c>
- 4e41: 8b 4d b0 movl 0xffffffb0(%ebp),%ecx
- 4e44: 8b 45 d4 movl 0xffffffd4(%ebp),%eax
- 4e47: 89 4d ec movl %ecx,0xffffffec(%ebp)
- 4e4a: a3 00 00 00 00 movl %eax,0x0
- 4e4b: R_386_32 current_function_decl
- 4e4f: 8b 55 e8 movl 0xffffffe8(%ebp),%edx
- 4e52: 8b 12 movl (%edx),%edx
- 4e54: 89 55 e8 movl %edx,0xffffffe8(%ebp)
- 4e57: 85 d2 testl %edx,%edx
- 4e59: 0f 85 d1 f8 ff jne 4730 <generate_classfile+0x34c>
- 4e5e: ff
- 4e5f: 8b 75 f0 movl 0xfffffff0(%ebp),%esi
- 4e62: 8b 45 ec movl 0xffffffec(%ebp),%eax
- 4e65: c1 f8 08 sarl $0x8,%eax
- 4e68: 88 06 movb %al,(%esi)
- 4e6a: 8a 4d ec movb 0xffffffec(%ebp),%cl
- 4e6d: 88 4e 01 movb %cl,0x1(%esi)
- 4e70: 8b 55 08 movl 0x8(%ebp),%edx
- 4e73: 8b 42 34 movl 0x34(%edx),%eax
- 4e76: 8b 70 0c movl 0xc(%eax),%esi
- 4e79: 89 f3 movl %esi,%ebx
- 4e7b: eb 0f jmp 4e8c <generate_classfile+0xaa8>
- 4e7d: 8d 76 00 leal 0x0(%esi),%esi
- 4e80: 3c 2f cmpb $0x2f,%al
- 4e82: 74 04 je 4e88 <generate_classfile+0xaa4>
- 4e84: 3c 5c cmpb $0x5c,%al
- 4e86: 75 03 jne 4e8b <generate_classfile+0xaa7>
- 4e88: 8d 5e 01 leal 0x1(%esi),%ebx
- 4e8b: 46 incl %esi
- 4e8c: 8a 06 movb (%esi),%al
- 4e8e: 84 c0 testb %al,%al
- 4e90: 75 ee jne 4e80 <generate_classfile+0xa9c>
- 4e92: 8b 4d 0c movl 0xc(%ebp),%ecx
- 4e95: 83 c4 fc addl $0xfffffffc,%esp
- 4e98: 51 pushl %ecx
- 4e99: 6a 0a pushl $0xa
- 4e9b: 6a 00 pushl $0x0
- 4e9d: e8 56 b2 ff ff call f8 <append_chunk>
- 4ea2: 89 c6 movl %eax,%esi
- 4ea4: c6 06 00 movb $0x0,(%esi)
- 4ea7: 46 incl %esi
- 4ea8: c6 06 01 movb $0x1,(%esi)
- 4eab: 46 incl %esi
- 4eac: 83 c4 10 addl $0x10,%esp
- 4eaf: 83 3d 04 00 00 cmpl $0x0,0x4
- 4eb4: 00 00
- 4eb1: R_386_32 .data
- 4eb6: 75 15 jne 4ecd <generate_classfile+0xae9>
- 4eb8: 83 c4 f4 addl $0xfffffff4,%esp
- 4ebb: 68 f9 06 00 00 pushl $0x6f9
- 4ebc: R_386_32 .rodata
- 4ec0: e8 fc ff ff ff call 4ec1 <generate_classfile+0xadd>
- 4ec1: R_386_PC32 get_identifier
- 4ec5: a3 04 00 00 00 movl %eax,0x4
- 4ec6: R_386_32 .data
- 4eca: 83 c4 10 addl $0x10,%esp
- 4ecd: a1 04 00 00 00 movl 0x4,%eax
- 4ece: R_386_32 .data
- 4ed2: 83 c4 f8 addl $0xfffffff8,%esp
- 4ed5: 50 pushl %eax
- 4ed6: 8b 45 ac movl 0xffffffac(%ebp),%eax
- 4ed9: 50 pushl %eax
- 4eda: e8 fc ff ff ff call 4edb <generate_classfile+0xaf7>
- 4edb: R_386_PC32 find_utf8_constant
- 4edf: 89 c7 movl %eax,%edi
- 4ee1: c1 f8 08 sarl $0x8,%eax
- 4ee4: 88 06 movb %al,(%esi)
- 4ee6: 46 incl %esi
- 4ee7: 89 fa movl %edi,%edx
- 4ee9: 88 16 movb %dl,(%esi)
- 4eeb: 46 incl %esi
- 4eec: c6 06 00 movb $0x0,(%esi)
- 4eef: 46 incl %esi
- 4ef0: c6 06 00 movb $0x0,(%esi)
- 4ef3: 46 incl %esi
- 4ef4: c6 06 00 movb $0x0,(%esi)
- 4ef7: 46 incl %esi
- 4ef8: c6 06 02 movb $0x2,(%esi)
- 4efb: 83 c4 f8 addl $0xfffffff8,%esp
- 4efe: 83 c4 f4 addl $0xfffffff4,%esp
- 4f01: 53 pushl %ebx
- 4f02: e8 fc ff ff ff call 4f03 <generate_classfile+0xb1f>
- 4f03: R_386_PC32 get_identifier
- 4f07: 50 pushl %eax
- 4f08: 8b 4d ac movl 0xffffffac(%ebp),%ecx
- 4f0b: 46 incl %esi
- 4f0c: 51 pushl %ecx
- 4f0d: e8 fc ff ff ff call 4f0e <generate_classfile+0xb2a>
- 4f0e: R_386_PC32 find_utf8_constant
- 4f12: 89 c7 movl %eax,%edi
- 4f14: c1 f8 08 sarl $0x8,%eax
- 4f17: 88 06 movb %al,(%esi)
- 4f19: 89 f8 movl %edi,%eax
- 4f1b: 88 46 01 movb %al,0x1(%esi)
- 4f1e: 8b 55 ac movl 0xffffffac(%ebp),%edx
- 4f21: 83 c4 30 addl $0x30,%esp
- 4f24: 83 c4 f4 addl $0xfffffff4,%esp
- 4f27: 52 pushl %edx
- 4f28: e8 fc ff ff ff call 4f29 <generate_classfile+0xb45>
- 4f29: R_386_PC32 count_constant_pool_bytes
- 4f2d: 8b 4d 0c movl 0xc(%ebp),%ecx
- 4f30: 8b 59 08 movl 0x8(%ecx),%ebx
- 4f33: 89 c7 movl %eax,%edi
- 4f35: 83 c4 10 addl $0x10,%esp
- 4f38: 8b 43 0c movl 0xc(%ebx),%eax
- 4f3b: 8b 53 10 movl 0x10(%ebx),%edx
- 4f3e: 29 c2 subl %eax,%edx
- 4f40: 89 d0 movl %edx,%eax
- 4f42: 39 f8 cmpl %edi,%eax
- 4f44: 7d 0d jnl 4f53 <generate_classfile+0xb6f>
- 4f46: 83 c4 f8 addl $0xfffffff8,%esp
- 4f49: 57 pushl %edi
- 4f4a: 53 pushl %ebx
- 4f4b: e8 fc ff ff ff call 4f4c <generate_classfile+0xb68>
- 4f4c: R_386_PC32 _obstack_newchunk
- 4f50: 83 c4 10 addl $0x10,%esp
- 4f53: 8b 4b 08 movl 0x8(%ebx),%ecx
- 4f56: 89 f8 movl %edi,%eax
- 4f58: 03 43 0c addl 0xc(%ebx),%eax
- 4f5b: 89 43 0c movl %eax,0xc(%ebx)
- 4f5e: 89 4d b4 movl %ecx,0xffffffb4(%ebp)
- 4f61: 39 c8 cmpl %ecx,%eax
- 4f63: 75 04 jne 4f69 <generate_classfile+0xb85>
- 4f65: 80 4b 28 02 orb $0x2,0x28(%ebx)
- 4f69: 8b 43 18 movl 0x18(%ebx),%eax
- 4f6c: 8b 4b 04 movl 0x4(%ebx),%ecx
- 4f6f: 8b 73 10 movl 0x10(%ebx),%esi
- 4f72: 89 c2 movl %eax,%edx
- 4f74: 03 53 0c addl 0xc(%ebx),%edx
- 4f77: f7 d0 notl %eax
- 4f79: 21 c2 andl %eax,%edx
- 4f7b: 89 53 0c movl %edx,0xc(%ebx)
- 4f7e: 29 ca subl %ecx,%edx
- 4f80: 89 f0 movl %esi,%eax
- 4f82: 29 c8 subl %ecx,%eax
- 4f84: 39 c2 cmpl %eax,%edx
- 4f86: 7e 03 jle 4f8b <generate_classfile+0xba7>
- 4f88: 89 73 0c movl %esi,0xc(%ebx)
- 4f8b: 8b 43 0c movl 0xc(%ebx),%eax
- 4f8e: 89 43 08 movl %eax,0x8(%ebx)
- 4f91: 8b 75 b4 movl 0xffffffb4(%ebp),%esi
- 4f94: 8b 45 fc movl 0xfffffffc(%ebp),%eax
- 4f97: 89 70 04 movl %esi,0x4(%eax)
- 4f9a: 89 78 08 movl %edi,0x8(%eax)
- 4f9d: 83 c4 fc addl $0xfffffffc,%esp
- 4fa0: 57 pushl %edi
- 4fa1: 56 pushl %esi
- 4fa2: 8b 55 ac movl 0xffffffac(%ebp),%edx
- 4fa5: 52 pushl %edx
- 4fa6: e8 fc ff ff ff call 4fa7 <generate_classfile+0xbc3>
- 4fa7: R_386_PC32 write_constant_pool
- 4fab: 8b 4d 0c movl 0xc(%ebp),%ecx
- 4fae: 8d 65 88 leal 0xffffff88(%ebp),%esp
- 4fb1: 5b popl %ebx
- 4fb2: 5e popl %esi
- 4fb3: 5f popl %edi
- 4fb4: 89 ec movl %ebp,%esp
- 4fb6: 5d popl %ebp
- 4fb7: 8b 01 movl (%ecx),%eax
- 4fb9: c3 ret
- 4fba: 89 f6 movl %esi,%esi
-
-00004fbc <make_class_file_name>:
- 4fbc: 55 pushl %ebp
- 4fbd: 89 e5 movl %esp,%ebp
- 4fbf: 83 ec 6c subl $0x6c,%esp
- 4fc2: 57 pushl %edi
- 4fc3: 56 pushl %esi
- 4fc4: 53 pushl %ebx
- 4fc5: 8b 5d 08 movl 0x8(%ebp),%ebx
- 4fc8: 83 c4 f4 addl $0xfffffff4,%esp
- 4fcb: 68 04 07 00 00 pushl $0x704
- 4fcc: R_386_32 .rodata
- 4fd0: 6a 2f pushl $0x2f
- 4fd2: 6a 2e pushl $0x2e
- 4fd4: 68 0b 07 00 00 pushl $0x70b
- 4fd5: R_386_32 .rodata
- 4fd9: 8b 43 34 movl 0x34(%ebx),%eax
- 4fdc: 8b 40 28 movl 0x28(%eax),%eax
- 4fdf: 50 pushl %eax
- 4fe0: e8 fc ff ff ff call 4fe1 <make_class_file_name+0x25>
- 4fe1: R_386_PC32 identifier_subst
- 4fe5: 8b 78 10 movl 0x10(%eax),%edi
- 4fe8: a1 00 00 00 00 movl 0x0,%eax
- 4fe9: R_386_32 jcf_write_base_directory
- 4fed: 83 c4 20 addl $0x20,%esp
- 4ff0: 85 c0 testl %eax,%eax
- 4ff2: 75 3c jne 5030 <make_class_file_name+0x74>
- 4ff4: 8b 43 34 movl 0x34(%ebx),%eax
- 4ff7: 83 c4 f8 addl $0xfffffff8,%esp
- 4ffa: 8b 70 0c movl 0xc(%eax),%esi
- 4ffd: 6a 2f pushl $0x2f
- 4fff: 56 pushl %esi
- 5000: e8 fc ff ff ff call 5001 <make_class_file_name+0x45>
- 5001: R_386_PC32 strrchr
- 5005: 89 c3 movl %eax,%ebx
- 5007: 83 c4 10 addl $0x10,%esp
- 500a: 85 db testl %ebx,%ebx
- 500c: 75 0a jne 5018 <make_class_file_name+0x5c>
- 500e: be 0c 07 00 00 movl $0x70c,%esi
- 500f: R_386_32 .rodata
- 5013: bb 0d 07 00 00 movl $0x70d,%ebx
- 5014: R_386_32 .rodata
- 5018: 83 c4 f8 addl $0xfffffff8,%esp
- 501b: 6a 2f pushl $0x2f
- 501d: 57 pushl %edi
- 501e: e8 fc ff ff ff call 501f <make_class_file_name+0x63>
- 501f: R_386_PC32 strrchr
- 5023: 83 c4 10 addl $0x10,%esp
- 5026: 85 c0 testl %eax,%eax
- 5028: 74 45 je 506f <make_class_file_name+0xb3>
- 502a: 8d 78 01 leal 0x1(%eax),%edi
- 502d: eb 40 jmp 506f <make_class_file_name+0xb3>
- 502f: 90 nop
- 5030: 89 c6 movl %eax,%esi
- 5032: 89 f3 movl %esi,%ebx
- 5034: 83 e0 03 andl $0x3,%eax
- 5037: 74 16 je 504f <make_class_file_name+0x93>
- 5039: 7a 0f jp 504a <make_class_file_name+0x8e>
- 503b: 83 f8 02 cmpl $0x2,%eax
- 503e: 74 05 je 5045 <make_class_file_name+0x89>
- 5040: 38 23 cmpb %ah,(%ebx)
- 5042: 74 2b je 506f <make_class_file_name+0xb3>
- 5044: 43 incl %ebx
- 5045: 38 23 cmpb %ah,(%ebx)
- 5047: 74 26 je 506f <make_class_file_name+0xb3>
- 5049: 43 incl %ebx
- 504a: 38 23 cmpb %ah,(%ebx)
- 504c: 74 21 je 506f <make_class_file_name+0xb3>
- 504e: 43 incl %ebx
- 504f: 8b 03 movl (%ebx),%eax
- 5051: 84 c0 testb %al,%al
- 5053: 74 1a je 506f <make_class_file_name+0xb3>
- 5055: 84 e4 testb %ah,%ah
- 5057: 74 15 je 506e <make_class_file_name+0xb2>
- 5059: a9 00 00 ff 00 testl $0xff0000,%eax
- 505e: 74 0d je 506d <make_class_file_name+0xb1>
- 5060: 83 c3 04 addl $0x4,%ebx
- 5063: a9 00 00 00 ff testl $0xff000000,%eax
- 5068: 75 e5 jne 504f <make_class_file_name+0x93>
- 506a: 83 eb 03 subl $0x3,%ebx
- 506d: 43 incl %ebx
- 506e: 43 incl %ebx
- 506f: 83 c4 f4 addl $0xfffffff4,%esp
- 5072: 29 f3 subl %esi,%ebx
- 5074: 89 fa movl %edi,%edx
- 5076: 89 f8 movl %edi,%eax
- 5078: 83 e2 03 andl $0x3,%edx
- 507b: 74 16 je 5093 <make_class_file_name+0xd7>
- 507d: 7a 0f jp 508e <make_class_file_name+0xd2>
- 507f: 83 fa 02 cmpl $0x2,%edx
- 5082: 74 05 je 5089 <make_class_file_name+0xcd>
- 5084: 38 30 cmpb %dh,(%eax)
- 5086: 74 2d je 50b5 <make_class_file_name+0xf9>
- 5088: 40 incl %eax
- 5089: 38 30 cmpb %dh,(%eax)
- 508b: 74 28 je 50b5 <make_class_file_name+0xf9>
- 508d: 40 incl %eax
- 508e: 38 30 cmpb %dh,(%eax)
- 5090: 74 23 je 50b5 <make_class_file_name+0xf9>
- 5092: 40 incl %eax
- 5093: 8b 10 movl (%eax),%edx
- 5095: 84 d2 testb %dl,%dl
- 5097: 74 1c je 50b5 <make_class_file_name+0xf9>
- 5099: 84 f6 testb %dh,%dh
- 509b: 74 17 je 50b4 <make_class_file_name+0xf8>
- 509d: f7 c2 00 00 ff testl $0xff0000,%edx
- 50a2: 00
- 50a3: 74 0e je 50b3 <make_class_file_name+0xf7>
- 50a5: 83 c0 04 addl $0x4,%eax
- 50a8: f7 c2 00 00 00 testl $0xff000000,%edx
- 50ad: ff
- 50ae: 75 e3 jne 5093 <make_class_file_name+0xd7>
- 50b0: 83 e8 03 subl $0x3,%eax
- 50b3: 40 incl %eax
- 50b4: 40 incl %eax
- 50b5: 29 f8 subl %edi,%eax
- 50b7: 8d 44 18 02 leal 0x2(%eax,%ebx,1),%eax
- 50bb: 50 pushl %eax
- 50bc: e8 fc ff ff ff call 50bd <make_class_file_name+0x101>
- 50bd: R_386_PC32 xmalloc
- 50c1: 89 45 9c movl %eax,0xffffff9c(%ebp)
- 50c4: 83 c4 fc addl $0xfffffffc,%esp
- 50c7: 53 pushl %ebx
- 50c8: 56 pushl %esi
- 50c9: 50 pushl %eax
- 50ca: e8 fc ff ff ff call 50cb <make_class_file_name+0x10f>
- 50cb: R_386_PC32 strncpy
- 50cf: 8b 55 9c movl 0xffffff9c(%ebp),%edx
- 50d2: c6 04 13 2f movb $0x2f,(%ebx,%edx,1)
- 50d6: 83 c4 20 addl $0x20,%esp
- 50d9: 83 c4 f8 addl $0xfffffff8,%esp
- 50dc: 57 pushl %edi
- 50dd: 8d 44 1a 01 leal 0x1(%edx,%ebx,1),%eax
- 50e1: 50 pushl %eax
- 50e2: e8 fc ff ff ff call 50e3 <make_class_file_name+0x127>
- 50e3: R_386_PC32 strcpy
- 50e7: 8b 45 9c movl 0xffffff9c(%ebp),%eax
- 50ea: 8d 74 03 01 leal 0x1(%ebx,%eax,1),%esi
- 50ee: 83 c4 10 addl $0x10,%esp
- 50f1: 8d 5d a0 leal 0xffffffa0(%ebp),%ebx
- 50f4: eb 60 jmp 5156 <make_class_file_name+0x19a>
- 50f6: c6 07 00 movb $0x0,(%edi)
- 50f9: 83 c4 fc addl $0xfffffffc,%esp
- 50fc: 53 pushl %ebx
- 50fd: 8b 55 9c movl 0xffffff9c(%ebp),%edx
- 5100: 52 pushl %edx
- 5101: 6a 03 pushl $0x3
- 5103: e8 fc ff ff ff call 5104 <make_class_file_name+0x148>
- 5104: R_386_PC32 __xstat
- 5108: 83 c4 10 addl $0x10,%esp
- 510b: 83 f8 ff cmpl $0xffffffff,%eax
- 510e: 75 30 jne 5140 <make_class_file_name+0x184>
- 5110: 83 c4 f8 addl $0xfffffff8,%esp
- 5113: 68 ed 01 00 00 pushl $0x1ed
- 5118: 8b 45 9c movl 0xffffff9c(%ebp),%eax
- 511b: 50 pushl %eax
- 511c: e8 fc ff ff ff call 511d <make_class_file_name+0x161>
- 511d: R_386_PC32 mkdir
- 5121: 83 c4 10 addl $0x10,%esp
- 5124: 83 f8 ff cmpl $0xffffffff,%eax
- 5127: 75 17 jne 5140 <make_class_file_name+0x184>
- 5129: 8b 55 9c movl 0xffffff9c(%ebp),%edx
- 512c: 83 c4 f8 addl $0xfffffff8,%esp
- 512f: 52 pushl %edx
- 5130: 68 20 07 00 00 pushl $0x720
- 5131: R_386_32 .rodata
- 5135: e8 fc ff ff ff call 5136 <make_class_file_name+0x17a>
- 5136: R_386_PC32 fatal
- 513a: 8d b6 00 00 00 leal 0x0(%esi),%esi
- 513f: 00
- 5140: c6 07 2f movb $0x2f,(%edi)
- 5143: 8d 77 01 leal 0x1(%edi),%esi
- 5146: 80 7f 01 2f cmpb $0x2f,0x1(%edi)
- 514a: 75 0a jne 5156 <make_class_file_name+0x19a>
- 514c: 8d 74 26 00 leal 0x0(%esi,1),%esi
- 5150: 46 incl %esi
- 5151: 80 3e 2f cmpb $0x2f,(%esi)
- 5154: 74 fa je 5150 <make_class_file_name+0x194>
- 5156: 83 c4 f8 addl $0xfffffff8,%esp
- 5159: 6a 2f pushl $0x2f
- 515b: 56 pushl %esi
- 515c: e8 fc ff ff ff call 515d <make_class_file_name+0x1a1>
- 515d: R_386_PC32 strchr
- 5161: 89 c7 movl %eax,%edi
- 5163: 83 c4 10 addl $0x10,%esp
- 5166: 85 ff testl %edi,%edi
- 5168: 75 8c jne 50f6 <make_class_file_name+0x13a>
- 516a: 8b 45 9c movl 0xffffff9c(%ebp),%eax
- 516d: 8d 65 88 leal 0xffffff88(%ebp),%esp
- 5170: 5b popl %ebx
- 5171: 5e popl %esi
- 5172: 5f popl %edi
- 5173: 89 ec movl %ebp,%esp
- 5175: 5d popl %ebp
- 5176: c3 ret
- 5177: 90 nop
-
-00005178 <write_classfile>:
- 5178: 55 pushl %ebp
- 5179: 89 e5 movl %esp,%ebp
- 517b: 81 ec 8c 00 00 subl $0x8c,%esp
- 5180: 00
- 5181: 57 pushl %edi
- 5182: 56 pushl %esi
- 5183: 53 pushl %ebx
- 5184: 8b 45 08 movl 0x8(%ebp),%eax
- 5187: 83 c4 f4 addl $0xfffffff4,%esp
- 518a: 50 pushl %eax
- 518b: e8 2c fe ff ff call 4fbc <make_class_file_name>
- 5190: 89 c6 movl %eax,%esi
- 5192: 83 c4 10 addl $0x10,%esp
- 5195: 8d 7d 80 leal 0xffffff80(%ebp),%edi
- 5198: 85 f6 testl %esi,%esi
- 519a: 0f 84 83 00 00 je 5223 <write_classfile+0xab>
- 519f: 00
- 51a0: 83 c4 f8 addl $0xfffffff8,%esp
- 51a3: 68 40 07 00 00 pushl $0x740
- 51a4: R_386_32 .rodata
- 51a8: 56 pushl %esi
- 51a9: e8 fc ff ff ff call 51aa <write_classfile+0x32>
- 51aa: R_386_PC32 fopen
- 51ae: 89 c3 movl %eax,%ebx
- 51b0: 83 c4 10 addl $0x10,%esp
- 51b3: 85 db testl %ebx,%ebx
- 51b5: 75 0e jne 51c5 <write_classfile+0x4d>
- 51b7: 83 c4 f8 addl $0xfffffff8,%esp
- 51ba: 56 pushl %esi
- 51bb: 68 60 07 00 00 pushl $0x760
- 51bc: R_386_32 .rodata
- 51c0: e8 fc ff ff ff call 51c1 <write_classfile+0x49>
- 51c1: R_386_PC32 fatal
- 51c5: 83 c4 f4 addl $0xfffffff4,%esp
- 51c8: 56 pushl %esi
- 51c9: e8 fc ff ff ff call 51ca <write_classfile+0x52>
- 51ca: R_386_PC32 jcf_dependency_add_target
- 51ce: 83 c4 f8 addl $0xfffffff8,%esp
- 51d1: 68 00 00 00 00 pushl $0x0
- 51d2: R_386_32 temporary_obstack
- 51d6: 57 pushl %edi
- 51d7: e8 bc f0 ff ff call 4298 <init_jcf_state>
- 51dc: 83 c4 20 addl $0x20,%esp
- 51df: 83 c4 f8 addl $0xfffffff8,%esp
- 51e2: 57 pushl %edi
- 51e3: 8b 45 08 movl 0x8(%ebp),%eax
- 51e6: 50 pushl %eax
- 51e7: e8 f8 f1 ff ff call 43e4 <generate_classfile>
- 51ec: 83 c4 f8 addl $0xfffffff8,%esp
- 51ef: 50 pushl %eax
- 51f0: 53 pushl %ebx
- 51f1: e8 f6 b4 ff ff call 6ec <write_chunks>
- 51f6: 83 c4 20 addl $0x20,%esp
- 51f9: 83 c4 f4 addl $0xfffffff4,%esp
- 51fc: 53 pushl %ebx
- 51fd: e8 fc ff ff ff call 51fe <write_classfile+0x86>
- 51fe: R_386_PC32 fclose
- 5202: 83 c4 10 addl $0x10,%esp
- 5205: 85 c0 testl %eax,%eax
- 5207: 74 0e je 5217 <write_classfile+0x9f>
- 5209: 83 c4 f8 addl $0xfffffff8,%esp
- 520c: 56 pushl %esi
- 520d: 68 80 07 00 00 pushl $0x780
- 520e: R_386_32 .rodata
- 5212: e8 fc ff ff ff call 5213 <write_classfile+0x9b>
- 5213: R_386_PC32 fatal
- 5217: 83 c4 f4 addl $0xfffffff4,%esp
- 521a: 56 pushl %esi
- 521b: e8 fc ff ff ff call 521c <write_classfile+0xa4>
- 521c: R_386_PC32 free
- 5220: 83 c4 10 addl $0x10,%esp
- 5223: 83 c4 f4 addl $0xfffffff4,%esp
- 5226: 57 pushl %edi
- 5227: e8 58 f1 ff ff call 4384 <release_jcf_state>
- 522c: 8d a5 68 ff ff leal 0xffffff68(%ebp),%esp
- 5231: ff
- 5232: 5b popl %ebx
- 5233: 5e popl %esi
- 5234: 5f popl %edi
- 5235: 89 ec movl %ebp,%esp
- 5237: 5d popl %ebp
- 5238: c3 ret
+ 4e05: 89 f9 movl %edi,%ecx
+ 4e07: 88 0e movb %cl,(%esi)
+ 4e09: 8b 7d b8 movl 0xffffffb8(%ebp),%edi
+ 4e0c: 46 incl %esi
+ 4e0d: 89 f8 movl %edi,%eax
+ 4e0f: c1 f8 08 sarl $0x8,%eax
+ 4e12: 88 06 movb %al,(%esi)
+ 4e14: 46 incl %esi
+ 4e15: 89 f8 movl %edi,%eax
+ 4e17: 88 06 movb %al,(%esi)
+ 4e19: 46 incl %esi
+ 4e1a: 83 c4 20 addl $0x20,%esp
+ 4e1d: 8d 76 00 leal 0x0(%esi),%esi
+ 4e20: 8b 55 bc movl 0xffffffbc(%ebp),%edx
+ 4e23: 83 c4 f8 addl $0xfffffff8,%esp
+ 4e26: 8b 42 10 movl 0x10(%edx),%eax
+ 4e29: 50 pushl %eax
+ 4e2a: 8b 4d ac movl 0xffffffac(%ebp),%ecx
+ 4e2d: 51 pushl %ecx
+ 4e2e: e8 fc ff ff ff call 4e2f <generate_classfile+0xa4b>
+ 4e2f: R_386_PC32 find_class_constant
+ 4e33: 89 c7 movl %eax,%edi
+ 4e35: c1 f8 08 sarl $0x8,%eax
+ 4e38: 88 06 movb %al,(%esi)
+ 4e3a: 89 f8 movl %edi,%eax
+ 4e3c: 88 46 01 movb %al,0x1(%esi)
+ 4e3f: 8b 55 bc movl 0xffffffbc(%ebp),%edx
+ 4e42: 83 c6 02 addl $0x2,%esi
+ 4e45: 83 c4 10 addl $0x10,%esp
+ 4e48: 8b 12 movl (%edx),%edx
+ 4e4a: 89 55 bc movl %edx,0xffffffbc(%ebp)
+ 4e4d: 85 d2 testl %edx,%edx
+ 4e4f: 75 cf jne 4e20 <generate_classfile+0xa3c>
+ 4e51: 8b 4d b0 movl 0xffffffb0(%ebp),%ecx
+ 4e54: 8b 45 d4 movl 0xffffffd4(%ebp),%eax
+ 4e57: 89 4d ec movl %ecx,0xffffffec(%ebp)
+ 4e5a: a3 00 00 00 00 movl %eax,0x0
+ 4e5b: R_386_32 current_function_decl
+ 4e5f: 8b 55 e8 movl 0xffffffe8(%ebp),%edx
+ 4e62: 8b 12 movl (%edx),%edx
+ 4e64: 89 55 e8 movl %edx,0xffffffe8(%ebp)
+ 4e67: 85 d2 testl %edx,%edx
+ 4e69: 0f 85 c1 f8 ff jne 4730 <generate_classfile+0x34c>
+ 4e6e: ff
+ 4e6f: 8b 75 f0 movl 0xfffffff0(%ebp),%esi
+ 4e72: 8b 45 ec movl 0xffffffec(%ebp),%eax
+ 4e75: c1 f8 08 sarl $0x8,%eax
+ 4e78: 88 06 movb %al,(%esi)
+ 4e7a: 8a 4d ec movb 0xffffffec(%ebp),%cl
+ 4e7d: 88 4e 01 movb %cl,0x1(%esi)
+ 4e80: 8b 55 08 movl 0x8(%ebp),%edx
+ 4e83: 8b 42 34 movl 0x34(%edx),%eax
+ 4e86: 8b 70 0c movl 0xc(%eax),%esi
+ 4e89: 89 f3 movl %esi,%ebx
+ 4e8b: eb 0f jmp 4e9c <generate_classfile+0xab8>
+ 4e8d: 8d 76 00 leal 0x0(%esi),%esi
+ 4e90: 3c 2f cmpb $0x2f,%al
+ 4e92: 74 04 je 4e98 <generate_classfile+0xab4>
+ 4e94: 3c 5c cmpb $0x5c,%al
+ 4e96: 75 03 jne 4e9b <generate_classfile+0xab7>
+ 4e98: 8d 5e 01 leal 0x1(%esi),%ebx
+ 4e9b: 46 incl %esi
+ 4e9c: 8a 06 movb (%esi),%al
+ 4e9e: 84 c0 testb %al,%al
+ 4ea0: 75 ee jne 4e90 <generate_classfile+0xaac>
+ 4ea2: 8b 4d 0c movl 0xc(%ebp),%ecx
+ 4ea5: 83 c4 fc addl $0xfffffffc,%esp
+ 4ea8: 51 pushl %ecx
+ 4ea9: 6a 0a pushl $0xa
+ 4eab: 6a 00 pushl $0x0
+ 4ead: e8 46 b2 ff ff call f8 <append_chunk>
+ 4eb2: 89 c6 movl %eax,%esi
+ 4eb4: c6 06 00 movb $0x0,(%esi)
+ 4eb7: 46 incl %esi
+ 4eb8: c6 06 01 movb $0x1,(%esi)
+ 4ebb: 46 incl %esi
+ 4ebc: 83 c4 10 addl $0x10,%esp
+ 4ebf: 83 3d 04 00 00 cmpl $0x0,0x4
+ 4ec4: 00 00
+ 4ec1: R_386_32 .data
+ 4ec6: 75 15 jne 4edd <generate_classfile+0xaf9>
+ 4ec8: 83 c4 f4 addl $0xfffffff4,%esp
+ 4ecb: 68 f9 06 00 00 pushl $0x6f9
+ 4ecc: R_386_32 .rodata
+ 4ed0: e8 fc ff ff ff call 4ed1 <generate_classfile+0xaed>
+ 4ed1: R_386_PC32 get_identifier
+ 4ed5: a3 04 00 00 00 movl %eax,0x4
+ 4ed6: R_386_32 .data
+ 4eda: 83 c4 10 addl $0x10,%esp
+ 4edd: a1 04 00 00 00 movl 0x4,%eax
+ 4ede: R_386_32 .data
+ 4ee2: 83 c4 f8 addl $0xfffffff8,%esp
+ 4ee5: 50 pushl %eax
+ 4ee6: 8b 45 ac movl 0xffffffac(%ebp),%eax
+ 4ee9: 50 pushl %eax
+ 4eea: e8 fc ff ff ff call 4eeb <generate_classfile+0xb07>
+ 4eeb: R_386_PC32 find_utf8_constant
+ 4eef: 89 c7 movl %eax,%edi
+ 4ef1: c1 f8 08 sarl $0x8,%eax
+ 4ef4: 88 06 movb %al,(%esi)
+ 4ef6: 46 incl %esi
+ 4ef7: 89 fa movl %edi,%edx
+ 4ef9: 88 16 movb %dl,(%esi)
+ 4efb: 46 incl %esi
+ 4efc: c6 06 00 movb $0x0,(%esi)
+ 4eff: 46 incl %esi
+ 4f00: c6 06 00 movb $0x0,(%esi)
+ 4f03: 46 incl %esi
+ 4f04: c6 06 00 movb $0x0,(%esi)
+ 4f07: 46 incl %esi
+ 4f08: c6 06 02 movb $0x2,(%esi)
+ 4f0b: 83 c4 f8 addl $0xfffffff8,%esp
+ 4f0e: 83 c4 f4 addl $0xfffffff4,%esp
+ 4f11: 53 pushl %ebx
+ 4f12: e8 fc ff ff ff call 4f13 <generate_classfile+0xb2f>
+ 4f13: R_386_PC32 get_identifier
+ 4f17: 50 pushl %eax
+ 4f18: 8b 4d ac movl 0xffffffac(%ebp),%ecx
+ 4f1b: 46 incl %esi
+ 4f1c: 51 pushl %ecx
+ 4f1d: e8 fc ff ff ff call 4f1e <generate_classfile+0xb3a>
+ 4f1e: R_386_PC32 find_utf8_constant
+ 4f22: 89 c7 movl %eax,%edi
+ 4f24: c1 f8 08 sarl $0x8,%eax
+ 4f27: 88 06 movb %al,(%esi)
+ 4f29: 89 f8 movl %edi,%eax
+ 4f2b: 88 46 01 movb %al,0x1(%esi)
+ 4f2e: 8b 55 ac movl 0xffffffac(%ebp),%edx
+ 4f31: 83 c4 30 addl $0x30,%esp
+ 4f34: 83 c4 f4 addl $0xfffffff4,%esp
+ 4f37: 52 pushl %edx
+ 4f38: e8 fc ff ff ff call 4f39 <generate_classfile+0xb55>
+ 4f39: R_386_PC32 count_constant_pool_bytes
+ 4f3d: 8b 4d 0c movl 0xc(%ebp),%ecx
+ 4f40: 8b 59 08 movl 0x8(%ecx),%ebx
+ 4f43: 89 c7 movl %eax,%edi
+ 4f45: 83 c4 10 addl $0x10,%esp
+ 4f48: 8b 43 0c movl 0xc(%ebx),%eax
+ 4f4b: 8b 53 10 movl 0x10(%ebx),%edx
+ 4f4e: 29 c2 subl %eax,%edx
+ 4f50: 89 d0 movl %edx,%eax
+ 4f52: 39 f8 cmpl %edi,%eax
+ 4f54: 7d 0d jnl 4f63 <generate_classfile+0xb7f>
+ 4f56: 83 c4 f8 addl $0xfffffff8,%esp
+ 4f59: 57 pushl %edi
+ 4f5a: 53 pushl %ebx
+ 4f5b: e8 fc ff ff ff call 4f5c <generate_classfile+0xb78>
+ 4f5c: R_386_PC32 _obstack_newchunk
+ 4f60: 83 c4 10 addl $0x10,%esp
+ 4f63: 8b 4b 08 movl 0x8(%ebx),%ecx
+ 4f66: 89 f8 movl %edi,%eax
+ 4f68: 03 43 0c addl 0xc(%ebx),%eax
+ 4f6b: 89 43 0c movl %eax,0xc(%ebx)
+ 4f6e: 89 4d b4 movl %ecx,0xffffffb4(%ebp)
+ 4f71: 39 c8 cmpl %ecx,%eax
+ 4f73: 75 04 jne 4f79 <generate_classfile+0xb95>
+ 4f75: 80 4b 28 02 orb $0x2,0x28(%ebx)
+ 4f79: 8b 43 18 movl 0x18(%ebx),%eax
+ 4f7c: 8b 4b 04 movl 0x4(%ebx),%ecx
+ 4f7f: 8b 73 10 movl 0x10(%ebx),%esi
+ 4f82: 89 c2 movl %eax,%edx
+ 4f84: 03 53 0c addl 0xc(%ebx),%edx
+ 4f87: f7 d0 notl %eax
+ 4f89: 21 c2 andl %eax,%edx
+ 4f8b: 89 53 0c movl %edx,0xc(%ebx)
+ 4f8e: 29 ca subl %ecx,%edx
+ 4f90: 89 f0 movl %esi,%eax
+ 4f92: 29 c8 subl %ecx,%eax
+ 4f94: 39 c2 cmpl %eax,%edx
+ 4f96: 7e 03 jle 4f9b <generate_classfile+0xbb7>
+ 4f98: 89 73 0c movl %esi,0xc(%ebx)
+ 4f9b: 8b 43 0c movl 0xc(%ebx),%eax
+ 4f9e: 89 43 08 movl %eax,0x8(%ebx)
+ 4fa1: 8b 75 b4 movl 0xffffffb4(%ebp),%esi
+ 4fa4: 8b 45 fc movl 0xfffffffc(%ebp),%eax
+ 4fa7: 89 70 04 movl %esi,0x4(%eax)
+ 4faa: 89 78 08 movl %edi,0x8(%eax)
+ 4fad: 83 c4 fc addl $0xfffffffc,%esp
+ 4fb0: 57 pushl %edi
+ 4fb1: 56 pushl %esi
+ 4fb2: 8b 55 ac movl 0xffffffac(%ebp),%edx
+ 4fb5: 52 pushl %edx
+ 4fb6: e8 fc ff ff ff call 4fb7 <generate_classfile+0xbd3>
+ 4fb7: R_386_PC32 write_constant_pool
+ 4fbb: 8b 4d 0c movl 0xc(%ebp),%ecx
+ 4fbe: 8d 65 88 leal 0xffffff88(%ebp),%esp
+ 4fc1: 5b popl %ebx
+ 4fc2: 5e popl %esi
+ 4fc3: 5f popl %edi
+ 4fc4: 89 ec movl %ebp,%esp
+ 4fc6: 5d popl %ebp
+ 4fc7: 8b 01 movl (%ecx),%eax
+ 4fc9: c3 ret
+ 4fca: 89 f6 movl %esi,%esi
+
+00004fcc <make_class_file_name>:
+ 4fcc: 55 pushl %ebp
+ 4fcd: 89 e5 movl %esp,%ebp
+ 4fcf: 83 ec 6c subl $0x6c,%esp
+ 4fd2: 57 pushl %edi
+ 4fd3: 56 pushl %esi
+ 4fd4: 53 pushl %ebx
+ 4fd5: 8b 5d 08 movl 0x8(%ebp),%ebx
+ 4fd8: 83 c4 f4 addl $0xfffffff4,%esp
+ 4fdb: 68 04 07 00 00 pushl $0x704
+ 4fdc: R_386_32 .rodata
+ 4fe0: 6a 2f pushl $0x2f
+ 4fe2: 6a 2e pushl $0x2e
+ 4fe4: 68 0b 07 00 00 pushl $0x70b
+ 4fe5: R_386_32 .rodata
+ 4fe9: 8b 43 34 movl 0x34(%ebx),%eax
+ 4fec: 8b 40 28 movl 0x28(%eax),%eax
+ 4fef: 50 pushl %eax
+ 4ff0: e8 fc ff ff ff call 4ff1 <make_class_file_name+0x25>
+ 4ff1: R_386_PC32 identifier_subst
+ 4ff5: 8b 78 10 movl 0x10(%eax),%edi
+ 4ff8: a1 00 00 00 00 movl 0x0,%eax
+ 4ff9: R_386_32 jcf_write_base_directory
+ 4ffd: 83 c4 20 addl $0x20,%esp
+ 5000: 85 c0 testl %eax,%eax
+ 5002: 75 3c jne 5040 <make_class_file_name+0x74>
+ 5004: 8b 43 34 movl 0x34(%ebx),%eax
+ 5007: 83 c4 f8 addl $0xfffffff8,%esp
+ 500a: 8b 70 0c movl 0xc(%eax),%esi
+ 500d: 6a 2f pushl $0x2f
+ 500f: 56 pushl %esi
+ 5010: e8 fc ff ff ff call 5011 <make_class_file_name+0x45>
+ 5011: R_386_PC32 strrchr
+ 5015: 89 c3 movl %eax,%ebx
+ 5017: 83 c4 10 addl $0x10,%esp
+ 501a: 85 db testl %ebx,%ebx
+ 501c: 75 0a jne 5028 <make_class_file_name+0x5c>
+ 501e: be 0c 07 00 00 movl $0x70c,%esi
+ 501f: R_386_32 .rodata
+ 5023: bb 0d 07 00 00 movl $0x70d,%ebx
+ 5024: R_386_32 .rodata
+ 5028: 83 c4 f8 addl $0xfffffff8,%esp
+ 502b: 6a 2f pushl $0x2f
+ 502d: 57 pushl %edi
+ 502e: e8 fc ff ff ff call 502f <make_class_file_name+0x63>
+ 502f: R_386_PC32 strrchr
+ 5033: 83 c4 10 addl $0x10,%esp
+ 5036: 85 c0 testl %eax,%eax
+ 5038: 74 45 je 507f <make_class_file_name+0xb3>
+ 503a: 8d 78 01 leal 0x1(%eax),%edi
+ 503d: eb 40 jmp 507f <make_class_file_name+0xb3>
+ 503f: 90 nop
+ 5040: 89 c6 movl %eax,%esi
+ 5042: 89 f3 movl %esi,%ebx
+ 5044: 83 e0 03 andl $0x3,%eax
+ 5047: 74 16 je 505f <make_class_file_name+0x93>
+ 5049: 7a 0f jp 505a <make_class_file_name+0x8e>
+ 504b: 83 f8 02 cmpl $0x2,%eax
+ 504e: 74 05 je 5055 <make_class_file_name+0x89>
+ 5050: 38 23 cmpb %ah,(%ebx)
+ 5052: 74 2b je 507f <make_class_file_name+0xb3>
+ 5054: 43 incl %ebx
+ 5055: 38 23 cmpb %ah,(%ebx)
+ 5057: 74 26 je 507f <make_class_file_name+0xb3>
+ 5059: 43 incl %ebx
+ 505a: 38 23 cmpb %ah,(%ebx)
+ 505c: 74 21 je 507f <make_class_file_name+0xb3>
+ 505e: 43 incl %ebx
+ 505f: 8b 03 movl (%ebx),%eax
+ 5061: 84 c0 testb %al,%al
+ 5063: 74 1a je 507f <make_class_file_name+0xb3>
+ 5065: 84 e4 testb %ah,%ah
+ 5067: 74 15 je 507e <make_class_file_name+0xb2>
+ 5069: a9 00 00 ff 00 testl $0xff0000,%eax
+ 506e: 74 0d je 507d <make_class_file_name+0xb1>
+ 5070: 83 c3 04 addl $0x4,%ebx
+ 5073: a9 00 00 00 ff testl $0xff000000,%eax
+ 5078: 75 e5 jne 505f <make_class_file_name+0x93>
+ 507a: 83 eb 03 subl $0x3,%ebx
+ 507d: 43 incl %ebx
+ 507e: 43 incl %ebx
+ 507f: 83 c4 f4 addl $0xfffffff4,%esp
+ 5082: 29 f3 subl %esi,%ebx
+ 5084: 89 fa movl %edi,%edx
+ 5086: 89 f8 movl %edi,%eax
+ 5088: 83 e2 03 andl $0x3,%edx
+ 508b: 74 16 je 50a3 <make_class_file_name+0xd7>
+ 508d: 7a 0f jp 509e <make_class_file_name+0xd2>
+ 508f: 83 fa 02 cmpl $0x2,%edx
+ 5092: 74 05 je 5099 <make_class_file_name+0xcd>
+ 5094: 38 30 cmpb %dh,(%eax)
+ 5096: 74 2d je 50c5 <make_class_file_name+0xf9>
+ 5098: 40 incl %eax
+ 5099: 38 30 cmpb %dh,(%eax)
+ 509b: 74 28 je 50c5 <make_class_file_name+0xf9>
+ 509d: 40 incl %eax
+ 509e: 38 30 cmpb %dh,(%eax)
+ 50a0: 74 23 je 50c5 <make_class_file_name+0xf9>
+ 50a2: 40 incl %eax
+ 50a3: 8b 10 movl (%eax),%edx
+ 50a5: 84 d2 testb %dl,%dl
+ 50a7: 74 1c je 50c5 <make_class_file_name+0xf9>
+ 50a9: 84 f6 testb %dh,%dh
+ 50ab: 74 17 je 50c4 <make_class_file_name+0xf8>
+ 50ad: f7 c2 00 00 ff testl $0xff0000,%edx
+ 50b2: 00
+ 50b3: 74 0e je 50c3 <make_class_file_name+0xf7>
+ 50b5: 83 c0 04 addl $0x4,%eax
+ 50b8: f7 c2 00 00 00 testl $0xff000000,%edx
+ 50bd: ff
+ 50be: 75 e3 jne 50a3 <make_class_file_name+0xd7>
+ 50c0: 83 e8 03 subl $0x3,%eax
+ 50c3: 40 incl %eax
+ 50c4: 40 incl %eax
+ 50c5: 29 f8 subl %edi,%eax
+ 50c7: 8d 44 18 02 leal 0x2(%eax,%ebx,1),%eax
+ 50cb: 50 pushl %eax
+ 50cc: e8 fc ff ff ff call 50cd <make_class_file_name+0x101>
+ 50cd: R_386_PC32 xmalloc
+ 50d1: 89 45 9c movl %eax,0xffffff9c(%ebp)
+ 50d4: 83 c4 fc addl $0xfffffffc,%esp
+ 50d7: 53 pushl %ebx
+ 50d8: 56 pushl %esi
+ 50d9: 50 pushl %eax
+ 50da: e8 fc ff ff ff call 50db <make_class_file_name+0x10f>
+ 50db: R_386_PC32 strncpy
+ 50df: 8b 55 9c movl 0xffffff9c(%ebp),%edx
+ 50e2: c6 04 13 2f movb $0x2f,(%ebx,%edx,1)
+ 50e6: 83 c4 20 addl $0x20,%esp
+ 50e9: 83 c4 f8 addl $0xfffffff8,%esp
+ 50ec: 57 pushl %edi
+ 50ed: 8d 44 1a 01 leal 0x1(%edx,%ebx,1),%eax
+ 50f1: 50 pushl %eax
+ 50f2: e8 fc ff ff ff call 50f3 <make_class_file_name+0x127>
+ 50f3: R_386_PC32 strcpy
+ 50f7: 8b 45 9c movl 0xffffff9c(%ebp),%eax
+ 50fa: 8d 74 03 01 leal 0x1(%ebx,%eax,1),%esi
+ 50fe: 83 c4 10 addl $0x10,%esp
+ 5101: 8d 5d a0 leal 0xffffffa0(%ebp),%ebx
+ 5104: eb 60 jmp 5166 <make_class_file_name+0x19a>
+ 5106: c6 07 00 movb $0x0,(%edi)
+ 5109: 83 c4 fc addl $0xfffffffc,%esp
+ 510c: 53 pushl %ebx
+ 510d: 8b 55 9c movl 0xffffff9c(%ebp),%edx
+ 5110: 52 pushl %edx
+ 5111: 6a 03 pushl $0x3
+ 5113: e8 fc ff ff ff call 5114 <make_class_file_name+0x148>
+ 5114: R_386_PC32 __xstat
+ 5118: 83 c4 10 addl $0x10,%esp
+ 511b: 83 f8 ff cmpl $0xffffffff,%eax
+ 511e: 75 30 jne 5150 <make_class_file_name+0x184>
+ 5120: 83 c4 f8 addl $0xfffffff8,%esp
+ 5123: 68 ed 01 00 00 pushl $0x1ed
+ 5128: 8b 45 9c movl 0xffffff9c(%ebp),%eax
+ 512b: 50 pushl %eax
+ 512c: e8 fc ff ff ff call 512d <make_class_file_name+0x161>
+ 512d: R_386_PC32 mkdir
+ 5131: 83 c4 10 addl $0x10,%esp
+ 5134: 83 f8 ff cmpl $0xffffffff,%eax
+ 5137: 75 17 jne 5150 <make_class_file_name+0x184>
+ 5139: 8b 55 9c movl 0xffffff9c(%ebp),%edx
+ 513c: 83 c4 f8 addl $0xfffffff8,%esp
+ 513f: 52 pushl %edx
+ 5140: 68 20 07 00 00 pushl $0x720
+ 5141: R_386_32 .rodata
+ 5145: e8 fc ff ff ff call 5146 <make_class_file_name+0x17a>
+ 5146: R_386_PC32 fatal
+ 514a: 8d b6 00 00 00 leal 0x0(%esi),%esi
+ 514f: 00
+ 5150: c6 07 2f movb $0x2f,(%edi)
+ 5153: 8d 77 01 leal 0x1(%edi),%esi
+ 5156: 80 7f 01 2f cmpb $0x2f,0x1(%edi)
+ 515a: 75 0a jne 5166 <make_class_file_name+0x19a>
+ 515c: 8d 74 26 00 leal 0x0(%esi,1),%esi
+ 5160: 46 incl %esi
+ 5161: 80 3e 2f cmpb $0x2f,(%esi)
+ 5164: 74 fa je 5160 <make_class_file_name+0x194>
+ 5166: 83 c4 f8 addl $0xfffffff8,%esp
+ 5169: 6a 2f pushl $0x2f
+ 516b: 56 pushl %esi
+ 516c: e8 fc ff ff ff call 516d <make_class_file_name+0x1a1>
+ 516d: R_386_PC32 strchr
+ 5171: 89 c7 movl %eax,%edi
+ 5173: 83 c4 10 addl $0x10,%esp
+ 5176: 85 ff testl %edi,%edi
+ 5178: 75 8c jne 5106 <make_class_file_name+0x13a>
+ 517a: 8b 45 9c movl 0xffffff9c(%ebp),%eax
+ 517d: 8d 65 88 leal 0xffffff88(%ebp),%esp
+ 5180: 5b popl %ebx
+ 5181: 5e popl %esi
+ 5182: 5f popl %edi
+ 5183: 89 ec movl %ebp,%esp
+ 5185: 5d popl %ebp
+ 5186: c3 ret
+ 5187: 90 nop
+
+00005188 <write_classfile>:
+ 5188: 55 pushl %ebp
+ 5189: 89 e5 movl %esp,%ebp
+ 518b: 81 ec 8c 00 00 subl $0x8c,%esp
+ 5190: 00
+ 5191: 57 pushl %edi
+ 5192: 56 pushl %esi
+ 5193: 53 pushl %ebx
+ 5194: 8b 45 08 movl 0x8(%ebp),%eax
+ 5197: 83 c4 f4 addl $0xfffffff4,%esp
+ 519a: 50 pushl %eax
+ 519b: e8 2c fe ff ff call 4fcc <make_class_file_name>
+ 51a0: 89 c6 movl %eax,%esi
+ 51a2: 83 c4 10 addl $0x10,%esp
+ 51a5: 8d 7d 80 leal 0xffffff80(%ebp),%edi
+ 51a8: 85 f6 testl %esi,%esi
+ 51aa: 0f 84 83 00 00 je 5233 <write_classfile+0xab>
+ 51af: 00
+ 51b0: 83 c4 f8 addl $0xfffffff8,%esp
+ 51b3: 68 40 07 00 00 pushl $0x740
+ 51b4: R_386_32 .rodata
+ 51b8: 56 pushl %esi
+ 51b9: e8 fc ff ff ff call 51ba <write_classfile+0x32>
+ 51ba: R_386_PC32 fopen
+ 51be: 89 c3 movl %eax,%ebx
+ 51c0: 83 c4 10 addl $0x10,%esp
+ 51c3: 85 db testl %ebx,%ebx
+ 51c5: 75 0e jne 51d5 <write_classfile+0x4d>
+ 51c7: 83 c4 f8 addl $0xfffffff8,%esp
+ 51ca: 56 pushl %esi
+ 51cb: 68 60 07 00 00 pushl $0x760
+ 51cc: R_386_32 .rodata
+ 51d0: e8 fc ff ff ff call 51d1 <write_classfile+0x49>
+ 51d1: R_386_PC32 fatal
+ 51d5: 83 c4 f4 addl $0xfffffff4,%esp
+ 51d8: 56 pushl %esi
+ 51d9: e8 fc ff ff ff call 51da <write_classfile+0x52>
+ 51da: R_386_PC32 jcf_dependency_add_target
+ 51de: 83 c4 f8 addl $0xfffffff8,%esp
+ 51e1: 68 00 00 00 00 pushl $0x0
+ 51e2: R_386_32 temporary_obstack
+ 51e6: 57 pushl %edi
+ 51e7: e8 ac f0 ff ff call 4298 <init_jcf_state>
+ 51ec: 83 c4 20 addl $0x20,%esp
+ 51ef: 83 c4 f8 addl $0xfffffff8,%esp
+ 51f2: 57 pushl %edi
+ 51f3: 8b 45 08 movl 0x8(%ebp),%eax
+ 51f6: 50 pushl %eax
+ 51f7: e8 e8 f1 ff ff call 43e4 <generate_classfile>
+ 51fc: 83 c4 f8 addl $0xfffffff8,%esp
+ 51ff: 50 pushl %eax
+ 5200: 53 pushl %ebx
+ 5201: e8 e6 b4 ff ff call 6ec <write_chunks>
+ 5206: 83 c4 20 addl $0x20,%esp
+ 5209: 83 c4 f4 addl $0xfffffff4,%esp
+ 520c: 53 pushl %ebx
+ 520d: e8 fc ff ff ff call 520e <write_classfile+0x86>
+ 520e: R_386_PC32 fclose
+ 5212: 83 c4 10 addl $0x10,%esp
+ 5215: 85 c0 testl %eax,%eax
+ 5217: 74 0e je 5227 <write_classfile+0x9f>
+ 5219: 83 c4 f8 addl $0xfffffff8,%esp
+ 521c: 56 pushl %esi
+ 521d: 68 80 07 00 00 pushl $0x780
+ 521e: R_386_32 .rodata
+ 5222: e8 fc ff ff ff call 5223 <write_classfile+0x9b>
+ 5223: R_386_PC32 fatal
+ 5227: 83 c4 f4 addl $0xfffffff4,%esp
+ 522a: 56 pushl %esi
+ 522b: e8 fc ff ff ff call 522c <write_classfile+0xa4>
+ 522c: R_386_PC32 free
+ 5230: 83 c4 10 addl $0x10,%esp
+ 5233: 83 c4 f4 addl $0xfffffff4,%esp
+ 5236: 57 pushl %edi
+ 5237: e8 48 f1 ff ff call 4384 <release_jcf_state>
+ 523c: 8d a5 68 ff ff leal 0xffffff68(%ebp),%esp
+ 5241: ff
+ 5242: 5b popl %ebx
+ 5243: 5e popl %esi
+ 5244: 5f popl %edi
+ 5245: 89 ec movl %ebp,%esp
+ 5247: 5d popl %ebp
+ 5248: c3 ret
>From mrs@wrs.com Tue Jun 22 18:59:00 1999
From: mrs@wrs.com (Mike Stump)
To: egcs-bugs@egcs.cygnus.com, egcs-patches@egcs.cygnus.com
Cc: law@cygnus.com
Subject: more ia32 bugs (unrolling)
Date: Tue, 22 Jun 1999 18:59:00 -0000
Message-id: <199906230159.SAA25401@kankakee.wrs.com>
X-SW-Source: 1999-06/msg00713.html
Content-length: 1900
Ok, here is the next one:
void
rescan () {
if (fee())
{
while (1) {
}
}
{
int newlines = foo();
while (0 < newlines--)
bar();
}
}
is is derived from cccp.c during a bootstrap. In unroll.c:
/* If there is a more than a single jump to the top of the loop
we cannot (easily) determine the iteration count. */
=>if (LABEL_NUSES (JUMP_LABEL (last_loop_insn)) > 1)
{
if (loop_dump_stream)
fprintf (loop_dump_stream,
"Loop iterations: Loop has multiple back edges.\n");
return 0;
}
JUMP_LABEL comes up 0. :-( And we die for it. In the old compiler,
no such code. I checked the source out, and this is new code:
revision 1.43
date: 1999/01/15 10:05:56; author: law; state: Exp; lines: +26 -5
8
* unroll.c (loop_iterations): Return 0 if the last loop insn
is not a jump insn or if the loop has multiple back edges.
I think there is a bug in that work. Maybe the below patch is the
right fix, maybe not. It does make the testcase work.
* unroll.c (loop_iterations): Don't assume that JUMP_LABEL is set.
Doing diffs in unroll.c.~1~:
*** unroll.c.~1~ Fri Jun 18 15:03:49 1999
--- unroll.c Tue Jun 22 18:51:14 1999
*************** loop_iterations (loop_start, loop_end, l
*** 3669,3675 ****
/* If there is a more than a single jump to the top of the loop
we cannot (easily) determine the iteration count. */
! if (LABEL_NUSES (JUMP_LABEL (last_loop_insn)) > 1)
{
if (loop_dump_stream)
fprintf (loop_dump_stream,
--- 3669,3676 ----
/* If there is a more than a single jump to the top of the loop
we cannot (easily) determine the iteration count. */
! if (JUMP_LABEL (last_loop_insn) == 0
! || LABEL_NUSES (JUMP_LABEL (last_loop_insn)) > 1)
{
if (loop_dump_stream)
fprintf (loop_dump_stream,
--------------
>From law@cygnus.com Tue Jun 22 20:54:00 1999
From: Jeffrey A Law <law@cygnus.com>
To: mrs@wrs.com (Mike Stump)
Cc: egcs-bugs@egcs.cygnus.com, egcs-patches@egcs.cygnus.com
Subject: Re: more ia32 bugs (unrolling)
Date: Tue, 22 Jun 1999 20:54:00 -0000
Message-id: <31073.930110036@upchuck.cygnus.com>
References: <199906230159.SAA25401@kankakee.wrs.com>
X-SW-Source: 1999-06/msg00714.html
Content-length: 1071
In message < 199906230159.SAA25401@kankakee.wrs.com >you write:
> Ok, here is the next one:
>
> void
> rescan () {
> if (fee())
> {
> while (1) {
> }
> }
>
> {
> int newlines = foo();
> while (0 < newlines--)
> bar();
> }
> }
>
> is is derived from cccp.c during a bootstrap. In unroll.c:
>
> /* If there is a more than a single jump to the top of the loop
> we cannot (easily) determine the iteration count. */
> =>if (LABEL_NUSES (JUMP_LABEL (last_loop_insn)) > 1)
> {
> if (loop_dump_stream)
> fprintf (loop_dump_stream,
> "Loop iterations: Loop has multiple back edges.\n");
> return 0;
> }
>
> JUMP_LABEL comes up 0. :-( And we die for it. In the old compiler,
> no such code. I checked the source out, and this is new code:
Err, I'd like to see last_loop_insn for this case. Something sounds pretty
bogus since I see nothing in that code which should lead to a jump with a
null JUMP_LABEL.
jeff
^ permalink raw reply [flat|nested] 16+ messages in thread
* bug in new ia32 backend
@ 1999-06-21 19:19 Mike Stump
1999-06-30 23:07 ` Richard Henderson
0 siblings, 1 reply; 16+ messages in thread
From: Mike Stump @ 1999-06-21 19:19 UTC (permalink / raw)
To: egcs-bugs; +Cc: rth
Ok, tracked the bug I mentioned on Friday down. The testcase is:
struct bb {
long zero_word;
};
static int trace_init = 0;
void __bb_init_trace_func (struct bb *blocks, unsigned long blockno) {
register int eax_ __asm__("eax");
register int ecx_ __asm__("ecx");
register int edx_ __asm__("edx");
register int esi_ __asm__("esi");
__asm__ __volatile__ ( "push{l} %0\n\t" "push{l} %1\n\t" "push{l} %2\n\t" "push{l} %3" : : "r"(eax_), "r"(ecx_), "r"(edx_), "r"(esi_));
if (!blocks->zero_word)
{
if (!trace_init)
{
__bb_init_prg ();
}
}
}
The bug has little to do with the testcase if I understand the bug. I
am on i586-pc-linux-gnulibc1, and found it via a native build, during
libgcc.a building.
The reduced command line was:
./xgcc -B./ t1.i -O2 -c -fPIC
The problem is that match_scratch appears to want to use (reg:SI 16
argp), even though this is a _fake_ register. The problem appears to
be those damn lies. The fake registers are not registers, and now
those lies are biting us. We can either stop telling lies, or fix up
the new code to be more aware of the lies.
find_free_register is the routine that invents the use of the argp,
but argp isn't a register. :-(
If I change the compiler to read:
;; Don't compare memory with zero, load and use a test instead.
(define_peephole2
[(set (reg:CCNO 17)
(compare:CCNO (match_operand:SI 0 "memory_operand" "")
(const_int 0)))]
"! optimize_size && 0"
[(set (match_scratch:SI 3 "r") (match_dup 0))
(set (reg:CCNO 17) (compare:CCNO (match_dup 3) (const_int 0)))]
"")
the testcase works, but only by accident. If you give me direction on
that best way you see to make this work, I might try and fix it.
Maybe if they are constrained to the index regs... instead of the
general regs?
Otherwise, I'll just continue bootstrapping and testing.
>From rth@cygnus.com Mon Jun 21 20:04:00 1999
From: Richard Henderson <rth@cygnus.com>
To: Mike Stump <mrs@wrs.com>, egcs-bugs@egcs.cygnus.com
Subject: Re: bug in new ia32 backend
Date: Mon, 21 Jun 1999 20:04:00 -0000
Message-id: <19990621200427.A23471@cygnus.com>
References: <199906220218.TAA24889@kankakee.wrs.com> <199906220218.TAA24889@kankakee.wrs.com>
X-SW-Source: 1999-06/msg00686.html
Content-length: 589
On Mon, Jun 21, 1999 at 07:18:49PM -0700, Mike Stump wrote:
> The problem is that match_scratch appears to want to use (reg:SI 16
> argp), even though this is a _fake_ register.
This should not be happening. find_free_register is supposed to
be ignoring fixed registers. From the cygnus source --
/* Don't allocate fixed registers. */
if (fixed_regs[regno])
continue;
I'm in the process of creating a branch off mainline that these
new patches can be dumped in while we're evaluating them. It'll
be `new_ia32_branch' (unimaginitively) once cvs is finished.
r~
>From mrs@wrs.com Mon Jun 21 20:22:00 1999
From: mrs@wrs.com (Mike Stump)
To: egcs-bugs@egcs.cygnus.com, rth@cygnus.com
Subject: Re: bug in new ia32 backend
Date: Mon, 21 Jun 1999 20:22:00 -0000
Message-id: <199906220322.UAA24968@kankakee.wrs.com>
X-SW-Source: 1999-06/msg00687.html
Content-length: 2231
> Date: Mon, 21 Jun 1999 20:04:27 -0700
> From: Richard Henderson <rth@cygnus.com>
> To: Mike Stump <mrs@wrs.com>, egcs-bugs@egcs.cygnus.com
> On Mon, Jun 21, 1999 at 07:18:49PM -0700, Mike Stump wrote:
> > The problem is that match_scratch appears to want to use (reg:SI 16
> > argp), even though this is a _fake_ register.
> This should not be happening. find_free_register is supposed to
> be ignoring fixed registers. From the cygnus source --
> /* Don't allocate fixed registers. */
> if (fixed_regs[regno])
> continue;
> I'm in the process of creating a branch off mainline that these
> new patches can be dumped in while we're evaluating them. It'll
> be `new_ia32_branch' (unimaginitively) once cvs is finished.
Ah, before:
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
int regno;
int success;
#ifdef REG_ALLOC_ORDER
regno = reg_alloc_order [i];
#else
regno = i;
#endif
/* Don't allocate fixed registers. */
if (fixed_regs[regno])
continue;
/* Make sure the register is of the right class. */
if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno))
continue;
/* And can support the mode we need. */
if (! HARD_REGNO_MODE_OK (regno, mode))
continue;
/* And that we don't create an extra save/restore. */
if (! call_used_regs[regno] && ! regs_ever_live[regno])
continue;
success = 1;
for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
{
if (TEST_HARD_REG_BIT (*reg_set, regno + j)
|| TEST_HARD_REG_BIT (used.regs, regno + j))
after:
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
int success = 1;
if (! TEST_HARD_REG_BIT (reg_class_contents[class], i))
continue;
for (j = HARD_REGNO_NREGS (i, mode) - 1; j >= 0; j--)
{
if (TEST_HARD_REG_BIT (*reg_set, i + j)
|| TEST_HARD_REG_BIT (used.regs, i + j))
Not sure where all the code went or why... merge droppage or
semi-intentional? I'll add the missing bits to my tree and continue
testing. As the new branch comes online, I will update to it, and
test that way (and submit real patches against it)...
>From rth@cygnus.com Mon Jun 21 20:26:00 1999
From: Richard Henderson <rth@cygnus.com>
To: Mike Stump <mrs@wrs.com>
Cc: egcs-bugs@egcs.cygnus.com
Subject: Re: bug in new ia32 backend
Date: Mon, 21 Jun 1999 20:26:00 -0000
Message-id: <19990621202649.A32470@cygnus.com>
References: <199906220322.UAA24968@kankakee.wrs.com> <199906220322.UAA24968@kankakee.wrs.com>
X-SW-Source: 1999-06/msg00688.html
Content-length: 346
On Mon, Jun 21, 1999 at 08:22:00PM -0700, Mike Stump wrote:
> Not sure where all the code went or why... merge droppage or
> semi-intentional?
Unintentional.
Now I remember. That work wasn't done on a branch, so my diffs
between branchpoints didn't pick it up. I'll go back and look
for the rest of the code associated with peephole2.
r~
>From rth@cygnus.com Mon Jun 21 20:34:00 1999
From: Richard Henderson <rth@cygnus.com>
To: Seapig6@aol.com
Cc: egcs-bugs@egcs.cygnus.com, kosak@cs.cmu.edu
Subject: Re: internal compiler error while building egcs-19990616 on alpha_dux40
Date: Mon, 21 Jun 1999 20:34:00 -0000
Message-id: <19990621203356.B32470@cygnus.com>
References: <81ef74d1.249be16e@aol.com> <81ef74d1.249be16e@aol.com>
X-SW-Source: 1999-06/msg00689.html
Content-length: 549
On Fri, Jun 18, 1999 at 01:52:46PM -0400, Seapig6@aol.com wrote:
> [ If you need to reply to me, please use the kosak@cs.cmu.edu address ]
>
> Recap: egcs-19990616 (I also tried egcs-19990608, with the same result)
> doesn't seem to build on alpha_dux40, failing when it tries to
> compile./alpha-dec-osf4.0d/libiberty/vasprintf.c.
Fixed here.
Fri Jun 18 15:44:18 1999 Richard Henderson <rth@cygnus.com>
* alpha.c (alpha_expand_block_move): Use get_insns rather than
gen_sequence as argument to emit_no_conflict_block.
r~
>From rth@cygnus.com Mon Jun 21 20:37:00 1999
From: Richard Henderson <rth@cygnus.com>
To: Paul Slootman <paul@wau.mis.ah.nl>
Cc: egcs-bugs@egcs.cygnus.com
Subject: Re: 'internal error--unrecognizable insn' on Alpha linux
Date: Mon, 21 Jun 1999 20:37:00 -0000
Message-id: <19990621203701.D32470@cygnus.com>
References: <19990615135837.A32543@wau.mis.ah.nl> <19990615135837.A32543@wau.mis.ah.nl>
X-SW-Source: 1999-06/msg00690.html
Content-length: 227
On Tue, Jun 15, 1999 at 01:58:37PM +0200, Paul Slootman wrote:
> egcs version: 1.1.2
> system type: Alpha (linux)
> command line: gcc -c -O2 bla.c
This no longer fails with gcc 2.95, so apparently the bug
has been fixed.
r~
>From rth@cygnus.com Mon Jun 21 20:38:00 1999
From: Richard Henderson <rth@cygnus.com>
To: Christopher C Chimelis <chris@beezer.med.miami.edu>
Cc: egcs-bugs@egcs.cygnus.com
Subject: Re: Last Internal compiler error on Alpha Linux (glibc 2.1.1)
Date: Mon, 21 Jun 1999 20:38:00 -0000
Message-id: <19990621203831.E32470@cygnus.com>
References: <Pine.LNX.3.96.990614195954.14274E-101000@beezer.med.miami.edu> <Pine.LNX.3.96.990614195954.14274E-101000@beezer.med.miami.edu>
X-SW-Source: 1999-06/msg00691.html
Content-length: 585
On Mon, Jun 14, 1999 at 08:08:29PM -0400, Christopher C Chimelis wrote:
> gcc -c -I. -I/usr/X11R6/include -Dlinux -D__alpha__
> -D_POSIX_C_SOURCE=199309L -D_POSIX_SOURCE -D_XOPEN_SOURCE=500L
> -D_BSD_SOURCE -D_SVID_SOURCE -D_REENTRANT -DUSEGRAY -DNO_MENU_LINES
> -D_REENTRANT -DFUNCPROTO=15 -DNARROWPROTO -DHAS_WCHAR_H -DHAS_WCTYPE_H
> -DNO_WIDEC_H -O2 Scrollbar.c -o unshared/Scrollbar.o
>
> I get this:
>
> ../../gcc/function.c:2416: Internal compiler error in function
> fixup_memory_subreg
This does not happen with gcc 2.95, so apparently the bug
has been fixed.
r~
>From rth@cygnus.com Mon Jun 21 20:40:00 1999
From: Richard Henderson <rth@cygnus.com>
To: Christopher C Chimelis <chris@beezer.med.miami.edu>
Cc: egcs-bugs@egcs.cygnus.com
Subject: Re: Internal compiler error on Alpha Linux (glibc 2.1.1)
Date: Mon, 21 Jun 1999 20:40:00 -0000
Message-id: <19990621203955.F32470@cygnus.com>
References: <Pine.LNX.3.96.990614193613.13528A-101000@beezer.med.miami.edu> <Pine.LNX.3.96.990614193613.13528A-101000@beezer.med.miami.edu>
X-SW-Source: 1999-06/msg00692.html
Content-length: 399
On Mon, Jun 14, 1999 at 07:43:52PM -0400, Christopher C Chimelis wrote:
>
> egcs version: 1.1.2
> system type: Alpha (linux)
> command line: (from xspread 3.1.1c source)
> gcc -I. -I. -c -O2 -g -Wall -L/usr/X11R6/lib interp.c
>
> I get this:
> ../../gcc/reload1.c:2060: Internal compiler error in function reload
This does not happen with gcc 2.95, so apparently the bug
has been fixed.
r~
>From rth@cygnus.com Mon Jun 21 20:41:00 1999
From: Richard Henderson <rth@cygnus.com>
To: Christopher C Chimelis <chris@beezer.med.miami.edu>
Cc: egcs-bugs@egcs.cygnus.com
Subject: Re: Another Internal compiler error on Alpha Linux (glibc 2.1.1)
Date: Mon, 21 Jun 1999 20:41:00 -0000
Message-id: <19990621204105.G32470@cygnus.com>
References: <Pine.LNX.3.96.990614195126.14274A-101000@beezer.med.miami.edu> <Pine.LNX.3.96.990614195126.14274A-101000@beezer.med.miami.edu>
X-SW-Source: 1999-06/msg00693.html
Content-length: 542
On Mon, Jun 14, 1999 at 07:58:01PM -0400, Christopher C Chimelis wrote:
>
> egcs version: 1.1.2
> system type: Alpha (linux)
> command line: (from r-base 0.64.1 source)
> gcc -mieee -Wall -O2 -I../include -I../../src/include -c dotcode.c \
> -o dotcode.o
> (ignore the slash...my mailer wraps the text and I wanted to keep it
> together)
>
> I get this:
> ../../gcc/reload1.c:2649: Internal compiler error in function
> verify_initial_elim_offsets
This does not happen with gcc 2.95, so apparently the bug
has been fixed.
r~
>From rth@cygnus.com Mon Jun 21 20:42:00 1999
From: Richard Henderson <rth@cygnus.com>
To: Falk Hueffner <falk.hueffner@student.uni-tuebingen.de>
Cc: egcs-bugs@egcs.cygnus.com
Subject: Re: sig11 on Alpha with 19990517 at >= -O1 -fstrength-reduce
Date: Mon, 21 Jun 1999 20:42:00 -0000
Message-id: <19990621204252.H32470@cygnus.com>
References: <st27lp79jyl.fsf@mirjam.informatik.uni-tuebingen.de> <st27lp79jyl.fsf@mirjam.informatik.uni-tuebingen.de>
X-SW-Source: 1999-06/msg00694.html
Content-length: 364
On Mon, Jun 14, 1999 at 12:04:33PM +0200, Falk Hueffner wrote:
> the following program produces an internal compiler error (segfault)
> on Linux Alpha. No problem without -O1, without -fstrength-reduce, or
> with the release version 1.1.2 (thus very likely not a hardware
> problem).
This does not happen with 19990621, so apparently the
bug has been fixed.
r~
>From amylaar@cygnus.co.uk Mon Jun 21 21:58:00 1999
From: Joern Rennecke <amylaar@cygnus.co.uk>
To: law@cygnus.com
Cc: amylaar@cygnus.co.uk, mrs@wrs.com, egcs-bugs@egcs.cygnus.com, amylaar@cygnus.com, egcs-patches@egcs.cygnus.com
Subject: Re: infinite loop in loop.c with -O2
Date: Mon, 21 Jun 1999 21:58:00 -0000
Message-id: <199906220458.FAA04133@phal.cygnus.co.uk>
References: <16267.930014731@upchuck.cygnus.com>
X-SW-Source: 1999-06/msg00695.html
Content-length: 27221
> Can you extract out just the changes necessary to deal with the fine_life_end
> problems.
It doesn't get much smaller this way, since the bulk is really replacing
find_life_end with find_giv_uses and the associated changes in
recombine_givs. Well, anyways, here it goes:
Tue Jun 22 05:53:44 1999 J"orn Rennecke <amylaar@cygnus.co.uk>
* loop.h (struct induction): New members live_after_loop,
leading_combined.
* loop.c (recombine_givs): Remove bogus index / giv lockstep looping.
Use leading_combined to determine if giv can't be derived.
* loop.c (find_life_end): Deleted.
(find_giv_uses, note_giv_use, cmp_giv_by_value_and_insn): New functions.
(strength_reduce): Set new fields in struct induction for givs.
(recombine_givs): New parameters. Changed caller.
(record_giv): Set new fields in struct induction.
Index: loop.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/loop.h,v
retrieving revision 1.18
diff -p -r1.18 loop.h
*** loop.h 1999/02/24 11:50:49 1.18
--- loop.h 1999/06/22 04:55:27
*************** struct induction
*** 101,106 ****
--- 101,114 ----
initialized in unrolled loop. */
unsigned shared : 1;
unsigned no_const_addval : 1; /* 1 if add_val does not contain a const. */
+ unsigned live_after_loop : 1; /* Used inside recombine_givs to keep track
+ of which givs have already been included
+ in an array of givs live after the loop. */
+ unsigned leading_combined : 1;/* In recombine_givs, set if this giv has been
+ combined with one or more other givs that
+ precede the giv insn of this giv.
+ Giv derivation then requires to move the
+ giv insn before the first use. */
int lifetime; /* Length of life of this giv */
rtx derive_adjustment; /* If nonzero, is an adjustment to be
subtracted from add_val when this giv
Index: loop.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/loop.c,v
retrieving revision 1.165
diff -p -r1.165 loop.c
*** loop.c 1999/06/17 13:35:59 1.165
--- loop.c 1999/06/22 04:55:30
*************** static rtx express_from_1 PROTO((rtx, rt
*** 330,337 ****
static rtx combine_givs_p PROTO((struct induction *, struct induction *));
static void combine_givs PROTO((struct iv_class *));
struct recombine_givs_stats;
! static int find_life_end PROTO((rtx, struct recombine_givs_stats *, rtx, rtx));
! static void recombine_givs PROTO((struct iv_class *, rtx, rtx, int));
static int product_cheap_p PROTO((rtx, rtx));
static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
--- 330,340 ----
static rtx combine_givs_p PROTO((struct induction *, struct induction *));
static void combine_givs PROTO((struct iv_class *));
struct recombine_givs_stats;
! static void find_giv_uses PROTO((rtx, struct recombine_givs_stats *, rtx,
! rtx));
! static void note_giv_use PROTO((struct induction *, rtx, int,
! struct recombine_givs_stats *));
! static void recombine_givs PROTO((struct iv_class *, rtx, rtx, rtx, rtx, int));
static int product_cheap_p PROTO((rtx, rtx));
static int maybe_eliminate_biv PROTO((struct iv_class *, rtx, rtx, int, int, int));
static int maybe_eliminate_biv_1 PROTO((rtx, rtx, struct iv_class *, int, rtx));
*************** strength_reduce (scan_start, end, loop_t
*** 4257,4266 ****
}
}
! /* If we can't get the LUIDs for the insns, we can't
! calculate the lifetime. This is likely from unrolling
! of an inner loop, so there is little point in making this
! a DEST_REG giv anyways. */
if (INSN_UID (v->insn) >= max_uid_for_loop
|| INSN_UID (last_use_insn) >= max_uid_for_loop
|| ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
--- 4260,4272 ----
}
}
! /* We'd like to make this a DEST_REG
! giv. However, after loop unrolling, V->INSN or LAST_USE_INSN
! might have no valid luid. We need these not only for
! calculating the lifetime now, but also in recombine_givs when
! doing giv derivation, to find givs with non-overlapping
! lifetimes. So if we don't have LUIDs available, or if we
! can't calculate the giv, leave the biv increment alone. */
if (INSN_UID (v->insn) >= max_uid_for_loop
|| INSN_UID (last_use_insn) >= max_uid_for_loop
|| ! validate_change (v->insn, &SET_DEST (set), dest_reg, 0))
*************** strength_reduce (scan_start, end, loop_t
*** 4745,4751 ****
/* Now that we know which givs will be reduced, try to rearrange the
combinations to reduce register pressure.
! recombine_givs calls find_life_end, which needs reg_iv_type and
reg_iv_info to be valid for all pseudos. We do the necessary
reallocation here since it allows to check if there are still
more bivs to process. */
--- 4751,4757 ----
/* Now that we know which givs will be reduced, try to rearrange the
combinations to reduce register pressure.
! recombine_givs calls find_giv_uses, which needs reg_iv_type and
reg_iv_info to be valid for all pseudos. We do the necessary
reallocation here since it allows to check if there are still
more bivs to process. */
*************** strength_reduce (scan_start, end, loop_t
*** 4760,4766 ****
VARRAY_GROW (reg_iv_type, nregs);
VARRAY_GROW (reg_iv_info, nregs);
}
! recombine_givs (bl, loop_start, loop_end, unroll_p);
/* Reduce each giv that we decided to reduce. */
--- 4766,4772 ----
VARRAY_GROW (reg_iv_type, nregs);
VARRAY_GROW (reg_iv_info, nregs);
}
! recombine_givs (bl, scan_start, loop_start, loop_end, loop_top, unroll_p);
/* Reduce each giv that we decided to reduce. */
*************** record_giv (v, insn, src_reg, dest_reg,
*** 5422,5427 ****
--- 5428,5434 ----
v->auto_inc_opt = 0;
v->unrolled = 0;
v->shared = 0;
+ v->leading_combined = 0;
v->derived_from = 0;
v->last_use = 0;
*************** struct recombine_givs_stats
*** 7066,7071 ****
--- 7073,7081 ----
{
int giv_number;
int start_luid, end_luid;
+ rtx start_insn; /* First insn in loop order in which the giv (including
+ combinations) is used; Initialized to NULL_RTX; set
+ to a NOTE when invalid. */
};
/* Used below as comparison function for qsort. We want a ascending luid
*************** cmp_recombine_givs_stats (x, y)
*** 7083,7095 ****
return d;
}
! /* Scan X, which is a part of INSN, for the end of life of a giv. Also
! look for the start of life of a giv where the start has not been seen
! yet to unlock the search for the end of its life.
! Only consider givs that belong to BIV.
! Return the total number of lifetime ends that have been found. */
! static int
! find_life_end (x, stats, insn, biv)
rtx x, insn, biv;
struct recombine_givs_stats *stats;
{
--- 7093,7144 ----
return d;
}
! /* The last label we encountered while scanning forward for giv uses.
! Is initialized to SCAN_START (not necessarily a label) in recombine_givs. */
! static rtx loop_last_label;
!
! /* V, a giv, is used in INSN.
! FROM_COMBINED is set if the use comes (possibly) from a combined giv.
! It must not be set if there are no combined givs for this giv, since
! this can confuse giv derivation to move the giv insn to the wrong place.
! Update start_insn / end_luid in STATS accordingly. */
! static void
! note_giv_use (v, insn, from_combined, stats)
! struct induction *v;
! rtx insn;
! int from_combined;
! struct recombine_givs_stats *stats;
! {
! if (stats[v->ix].start_insn)
! {
! if (loop_insn_first_p (stats[v->ix].start_insn, loop_last_label)
! && (loop_insn_first_p (loop_last_label, insn)
! || loop_insn_first_p (insn, stats[v->ix].start_insn)))
! stats[v->ix].start_insn = loop_number_loop_starts[0];
! }
! else
! {
! rtx p;
!
! stats[v->ix].start_insn = insn;
! if (from_combined)
! v->leading_combined = 1;
!
! /* Update start_luid now so that we won't loose this information it
! when we invalidate start_insn. */
! for (p = insn; INSN_UID (p) >= max_uid_for_loop; )
! p = PREV_INSN (p);
! stats[v->ix].start_luid = INSN_LUID (p);
! }
! while (INSN_UID (insn) >= max_uid_for_loop)
! insn = NEXT_INSN (insn);
! stats[v->ix].end_luid = INSN_LUID (insn);
! }
!
! /* Scan X, which is a part of INSN, for uses of givs.
! Only consider givs that belong to BIV. */
! static void
! find_giv_uses (x, stats, insn, biv)
rtx x, insn, biv;
struct recombine_givs_stats *stats;
{
*************** find_life_end (x, stats, insn, biv)
*** 7111,7158 ****
if (REG_IV_TYPE (regno) == GENERAL_INDUCT
&& ! v->ignore
! && v->src_reg == biv
! && stats[v->ix].end_luid <= 0)
{
! /* If we see a 0 here for end_luid, it means that we have
! scanned the entire loop without finding any use at all.
! We must not predicate this code on a start_luid match
! since that would make the test fail for givs that have
! been hoisted out of inner loops. */
! if (stats[v->ix].end_luid == 0)
{
! stats[v->ix].end_luid = stats[v->ix].start_luid;
! return 1 + find_life_end (SET_SRC (x), stats, insn, biv);
}
- else if (stats[v->ix].start_luid == INSN_LUID (insn))
- stats[v->ix].end_luid = 0;
}
- return find_life_end (SET_SRC (x), stats, insn, biv);
}
break;
}
case REG:
{
int regno = REGNO (x);
! struct induction *v = REG_IV_INFO (regno);
!
! if (REG_IV_TYPE (regno) == GENERAL_INDUCT
! && ! v->ignore
! && v->src_reg == biv
! && stats[v->ix].end_luid == 0)
{
! while (INSN_UID (insn) >= max_uid_for_loop)
! insn = NEXT_INSN (insn);
! stats[v->ix].end_luid = INSN_LUID (insn);
! return 1;
}
! return 0;
}
case LABEL_REF:
case CONST_DOUBLE:
case CONST_INT:
case CONST:
! return 0;
default:
break;
}
--- 7160,7235 ----
if (REG_IV_TYPE (regno) == GENERAL_INDUCT
&& ! v->ignore
! && v->src_reg == biv)
{
! /* Since we are setting a non-ignored general induction
! variable, this insn will be changed or go away, hence
! we don't have to consider uses in the SET_SRC. */
! return;
! }
! find_giv_uses (SET_SRC (x), stats, insn, biv);
! return;
! }
! break;
! }
! /* If this is a reduced DEST_ADDR giv, the original address doesn't
! count; but if the giv has been combined with another one, we must
! count the use there. */
! case MEM:
! {
! rtx src_reg;
! rtx add_val;
! rtx mult_val;
! int benefit;
! struct induction *v;
!
! if (general_induction_var (XEXP (x, 0), &src_reg, &add_val,
! &mult_val, 1, &benefit)
! && src_reg == biv)
! {
! for (v = reg_biv_class[REGNO (biv)]->giv; v; v = v->next_iv)
! {
! if (v->location == &XEXP (x, 0))
{
! int from_combined = 0;
!
! if (v->same)
! {
! v = v->same;
! from_combined = 1;
! }
! if (v->ignore)
! break;
! note_giv_use (v, insn, from_combined, stats);
! return;
}
}
}
break;
}
case REG:
{
int regno = REGNO (x);
! if (REG_IV_TYPE (regno) == GENERAL_INDUCT)
{
! struct induction *v = REG_IV_INFO (regno);
! int from_combined = 0;
!
! if (v->same)
! {
! v = v->same;
! from_combined = 1;
! }
! if (! v->ignore && v->src_reg == biv)
! note_giv_use (v, insn, from_combined, stats);
}
! return;
}
case LABEL_REF:
case CONST_DOUBLE:
case CONST_INT:
case CONST:
! return;
default:
break;
}
*************** find_life_end (x, stats, insn, biv)
*** 7161,7173 ****
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
! retval += find_life_end (XEXP (x, i), stats, insn, biv);
else if (fmt[i] == 'E')
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
! retval += find_life_end (XVECEXP (x, i, j), stats, insn, biv);
}
! return retval;
}
/* For each giv that has been combined with another, look if
--- 7238,7250 ----
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (fmt[i] == 'e')
! find_giv_uses (XEXP (x, i), stats, insn, biv);
else if (fmt[i] == 'E')
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
! find_giv_uses (XVECEXP (x, i, j), stats, insn, biv);
}
! return;
}
/* For each giv that has been combined with another, look if
*************** find_life_end (x, stats, insn, biv)
*** 7175,7190 ****
This tends to shorten giv lifetimes, and helps the next step:
try to derive givs from other givs. */
static void
! recombine_givs (bl, loop_start, loop_end, unroll_p)
struct iv_class *bl;
! rtx loop_start, loop_end;
int unroll_p;
{
struct induction *v, **giv_array, *last_giv;
struct recombine_givs_stats *stats;
int giv_count;
int i, rescan;
! int ends_need_computing;
for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
{
--- 7252,7269 ----
This tends to shorten giv lifetimes, and helps the next step:
try to derive givs from other givs. */
static void
! recombine_givs (bl, scan_start, loop_start, loop_end, loop_top, unroll_p)
struct iv_class *bl;
! rtx scan_start, loop_start, loop_end, loop_top;
int unroll_p;
{
struct induction *v, **giv_array, *last_giv;
struct recombine_givs_stats *stats;
int giv_count;
int i, rescan;
! int n_giv_live_after_loop;
! struct induction **giv_live_after_loop;
! int life_start, life_end;
for (giv_count = 0, v = bl->giv; v; v = v->next_iv)
{
*************** recombine_givs (bl, loop_start, loop_end
*** 7195,7208 ****
= (struct induction **) alloca (giv_count * sizeof (struct induction *));
stats = (struct recombine_givs_stats *) alloca (giv_count * sizeof *stats);
! /* Initialize stats and set up the ix field for each giv in stats to name
! the corresponding index into stats. */
for (i = 0, v = bl->giv; v; v = v->next_iv)
{
rtx p;
if (v->ignore)
continue;
giv_array[i] = v;
stats[i].giv_number = i;
/* If this giv has been hoisted out of an inner loop, use the luid of
--- 7274,7287 ----
= (struct induction **) alloca (giv_count * sizeof (struct induction *));
stats = (struct recombine_givs_stats *) alloca (giv_count * sizeof *stats);
! /* Initialize stats, and clear the live_after_loop fields. */
for (i = 0, v = bl->giv; v; v = v->next_iv)
{
rtx p;
if (v->ignore)
continue;
+ v->live_after_loop = 0;
giv_array[i] = v;
stats[i].giv_number = i;
/* If this giv has been hoisted out of an inner loop, use the luid of
*************** recombine_givs (bl, loop_start, loop_end
*** 7210,7215 ****
--- 7289,7295 ----
for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
p = PREV_INSN (p);
stats[i].start_luid = INSN_LUID (p);
+ stats[i].start_insn = NULL_RTX;
i++;
}
*************** recombine_givs (bl, loop_start, loop_end
*** 7264,7393 ****
last_giv = v;
}
! ends_need_computing = 0;
! /* For each DEST_REG giv, compute lifetime starts, and try to compute
! lifetime ends from regscan info. */
! for (i = 0, v = bl->giv; v; v = v->next_iv)
{
! if (v->ignore)
continue;
! if (v->giv_type == DEST_ADDR)
! {
! /* Loop unrolling of an inner loop can even create new DEST_REG
! givs. */
! rtx p;
! for (p = v->insn; INSN_UID (p) >= max_uid_for_loop; )
! p = PREV_INSN (p);
! stats[i].start_luid = stats[i].end_luid = INSN_LUID (p);
! if (p != v->insn)
! stats[i].end_luid++;
! }
! else /* v->giv_type == DEST_REG */
! {
! if (v->last_use)
! {
! stats[i].start_luid = INSN_LUID (v->insn);
! stats[i].end_luid = INSN_LUID (v->last_use);
! }
! else if (INSN_UID (v->insn) >= max_uid_for_loop)
! {
! rtx p;
! /* This insn has been created by loop optimization on an inner
! loop. We don't have a proper start_luid that will match
! when we see the first set. But we do know that there will
! be no use before the set, so we can set end_luid to 0 so that
! we'll start looking for the last use right away. */
! for (p = PREV_INSN (v->insn); INSN_UID (p) >= max_uid_for_loop; )
! p = PREV_INSN (p);
! stats[i].start_luid = INSN_LUID (p);
! stats[i].end_luid = 0;
! ends_need_computing++;
! }
! else
! {
! int regno = REGNO (v->dest_reg);
! int count = VARRAY_INT (n_times_set, regno) - 1;
! rtx p = v->insn;
!
! /* Find the first insn that sets the giv, so that we can verify
! if this giv's lifetime wraps around the loop. We also need
! the luid of the first setting insn in order to detect the
! last use properly. */
! while (count)
! {
! p = prev_nonnote_insn (p);
! if (reg_set_p (v->dest_reg, p))
! count--;
! }
! stats[i].start_luid = INSN_LUID (p);
! if (stats[i].start_luid > uid_luid[REGNO_FIRST_UID (regno)])
! {
! stats[i].end_luid = -1;
! ends_need_computing++;
! }
! else
! {
! stats[i].end_luid = uid_luid[REGNO_LAST_UID (regno)];
! if (stats[i].end_luid > INSN_LUID (loop_end))
! {
! stats[i].end_luid = -1;
! ends_need_computing++;
! }
! }
! }
}
- i++;
}
! /* If the regscan information was unconclusive for one or more DEST_REG
! givs, scan the all insn in the loop to find out lifetime ends. */
! if (ends_need_computing)
! {
! rtx biv = bl->biv->src_reg;
! rtx p = loop_end;
!
! do
! {
! if (p == loop_start)
! p = loop_end;
! p = PREV_INSN (p);
! if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
! continue;
! ends_need_computing -= find_life_end (PATTERN (p), stats, p, biv);
! }
! while (ends_need_computing);
! }
! /* Set start_luid back to the last insn that sets the giv. This allows
! more combinations. */
! for (i = 0, v = bl->giv; v; v = v->next_iv)
! {
! if (v->ignore)
! continue;
! if (INSN_UID (v->insn) < max_uid_for_loop)
! stats[i].start_luid = INSN_LUID (v->insn);
! i++;
! }
! /* Now adjust lifetime ends by taking combined givs into account. */
! for (i = 0, v = bl->giv; v; v = v->next_iv)
! {
! unsigned luid;
! int j;
! if (v->ignore)
continue;
! if (v->same && ! v->same->ignore)
! {
! j = v->same->ix;
! luid = stats[i].start_luid;
! /* Use unsigned arithmetic to model loop wrap-around. */
! if (luid - stats[j].start_luid
! > (unsigned) stats[j].end_luid - stats[j].start_luid)
! stats[j].end_luid = luid;
! }
! i++;
}
qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
--- 7344,7436 ----
last_giv = v;
}
! /* Set up the giv_live_after_loop array. */
! n_giv_live_after_loop = 0;
! giv_live_after_loop = NULL_PTR;
! for (v = bl->giv; v; v = v->next_iv)
{
! struct induction *same;
!
! if (v->giv_type != DEST_REG || v->last_use)
continue;
! if ((uid_luid[REGNO_FIRST_UID (REGNO (v->dest_reg))]
! > INSN_LUID (loop_start))
! && (uid_luid[REGNO_LAST_UID (REGNO (v->dest_reg))]
! < INSN_LUID (loop_end)))
! continue;
! same = v->same ? v->same : v;
! if (! same->ignore
! && ! same->live_after_loop)
! {
! same->live_after_loop = 1;
! if (! giv_live_after_loop)
! giv_live_after_loop
! = (struct induction **) alloca (sizeof (struct induction *)
! * giv_count);
! giv_live_after_loop[n_giv_live_after_loop++] = same;
}
}
! /* Scan all the insns in the loop to find out lifetime starts and ends. */
! {
! rtx biv = bl->biv->src_reg;
! rtx p = loop_end;
! for (loop_last_label = scan_start, p = scan_start; p;
! p = next_insn_in_loop (p, scan_start, loop_end, loop_top))
! {
! if (GET_CODE (p) == CODE_LABEL)
! loop_last_label = p;
! else if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
! {
! find_giv_uses (PATTERN (p), stats, p, biv);
! /* If this is a jump, we have to consider uses outside the loop. */
! if (GET_CODE (p) == JUMP_INSN && GET_CODE (PATTERN (p)) != RETURN)
! {
! int is_loop_exit = 1;
! rtx label;
! if (condjump_p (p) || condjump_in_parallel_p (p))
! {
! label = XEXP (condjump_label (p), 0);
! /* If the destination is within the loop, and this
! is not a conditional branch at the loop end, this
! is not a loop exit. */
! if (loop_insn_first_p (loop_start, label)
! && loop_insn_first_p (label, loop_end)
! && (simplejump_p (p)
! /* Shortcut for forward branches - by definition,
! they can't be the end of the loop */
! || loop_insn_first_p (p, label)
! || ! no_labels_between_p (p, loop_end)))
! is_loop_exit = 0;
! }
! if (is_loop_exit)
! {
! for (i = n_giv_live_after_loop -1; i >= 0; i--)
! /* We don't have recorded which givs are life after the
! loop only because their giv register is life, or
! (also) because a combined giv is life after the loop,
! so just pretend it is the latter if any other givs
! have been combined with this one. */
! note_giv_use (giv_live_after_loop[i], p,
! giv_live_after_loop[i]->combined_with,
! stats);
! }
! }
! }
! }
! }
! /* Ignore givs that are not used at all. */
! for (i = giv_count - 1; i >= 0; i--)
! {
! v = giv_array[stats[i].giv_number];
! if (v->ignore || v->same)
continue;
! if (! stats[i].start_insn)
! v->ignore = 1;
}
qsort (stats, giv_count, sizeof(*stats), cmp_recombine_givs_stats);
*************** recombine_givs (bl, loop_start, loop_end
*** 7403,7418 ****
When we are finished with the current LAST_GIV (i.e. the inner loop
terminates), we start again with rescan, which then becomes the new
LAST_GIV. */
for (i = giv_count - 1; i >= 0; i = rescan)
{
! int life_start, life_end;
!
! for (last_giv = 0, rescan = -1; i >= 0; i--)
{
rtx sum;
v = giv_array[stats[i].giv_number];
! if (v->giv_type != DEST_REG || v->derived_from || v->same)
continue;
if (! last_giv)
{
--- 7446,7462 ----
When we are finished with the current LAST_GIV (i.e. the inner loop
terminates), we start again with rescan, which then becomes the new
LAST_GIV. */
+
+ last_giv = 0;
+
for (i = giv_count - 1; i >= 0; i = rescan)
{
! for (rescan = -1; i >= 0; i--)
{
rtx sum;
v = giv_array[stats[i].giv_number];
! if (v->giv_type != DEST_REG || v->derived_from || v->same || v->ignore)
continue;
if (! last_giv)
{
*************** recombine_givs (bl, loop_start, loop_end
*** 7426,7443 ****
}
continue;
}
/* Use unsigned arithmetic to model loop wrap around. */
if (((unsigned) stats[i].start_luid - life_start
>= (unsigned) life_end - life_start)
&& ((unsigned) stats[i].end_luid - life_start
> (unsigned) life_end - life_start)
- /* Check that the giv insn we're about to use for deriving
- precedes all uses of that giv. Note that initializing the
- derived giv would defeat the purpose of reducing register
- pressure.
- ??? We could arrange to move the insn. */
- && ((unsigned) stats[i].end_luid - INSN_LUID (loop_start)
- > (unsigned) stats[i].start_luid - INSN_LUID (loop_start))
&& rtx_equal_p (last_giv->mult_val, v->mult_val)
/* ??? Could handle libcalls, but would need more logic. */
&& ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
--- 7470,7481 ----
}
continue;
}
+
/* Use unsigned arithmetic to model loop wrap around. */
if (((unsigned) stats[i].start_luid - life_start
>= (unsigned) life_end - life_start)
&& ((unsigned) stats[i].end_luid - life_start
> (unsigned) life_end - life_start)
&& rtx_equal_p (last_giv->mult_val, v->mult_val)
/* ??? Could handle libcalls, but would need more logic. */
&& ! find_reg_note (v->insn, REG_RETVAL, NULL_RTX)
*************** recombine_givs (bl, loop_start, loop_end
*** 7447,7458 ****
don't have this detailed control flow information.
N.B. since last_giv will be reduced, it is valid
anywhere in the loop, so we don't need to check the
! validity of last_giv.
! We rely here on the fact that v->always_executed implies that
! there is no jump to someplace else in the loop before the
! giv insn, and hence any insn that is executed before the
! giv insn in the loop will have a lower luid. */
! && (v->always_executed || ! v->combined_with)
&& (sum = express_from (last_giv, v))
/* Make sure we don't make the add more expensive. ADD_COST
doesn't take different costs of registers and constants into
--- 7485,7507 ----
don't have this detailed control flow information.
N.B. since last_giv will be reduced, it is valid
anywhere in the loop, so we don't need to check the
! validity of last_giv. */
! && (! v->combined_with
! /* We rely here on the fact that v->always_executed implies
! that there is no jump to someplace else in the loop before
! the giv insn, and hence any insn that is executed before
! the giv insn in the loop will have a lower luid. */
! /* ??? If leading_combined is set and stats[i].start_insn
! is a set to a non-note insn, we could move the insn. */
! || (v->always_executed
! && ! v->leading_combined
! /* Check that the giv insn we're about to use for
! deriving precedes all uses of that giv. Note that
! initializing the derived giv would defeat the purpose
! of reducing register pressure. */
! && ((unsigned) stats[i].end_luid - INSN_LUID (scan_start)
! > ((unsigned) stats[i].start_luid
! - INSN_LUID (scan_start)))))
&& (sum = express_from (last_giv, v))
/* Make sure we don't make the add more expensive. ADD_COST
doesn't take different costs of registers and constants into
*************** recombine_givs (bl, loop_start, loop_end
*** 7483,7488 ****
--- 7532,7538 ----
else if (rescan < 0)
rescan = i;
}
+ last_giv = 0;
}
}
\f
>From Wolfgang.Bangerth@IWR.Uni-Heidelberg.De Tue Jun 22 01:04:00 1999
From: Wolfgang Bangerth <Wolfgang.Bangerth@IWR.Uni-Heidelberg.De>
To: egcs-bugs@egcs.cygnus.com
Subject: ICE on address of template function
Date: Tue, 22 Jun 1999 01:04:00 -0000
Message-id: <Pine.SOL.4.05.9906221003060.602-100000@kronos>
X-SW-Source: 1999-06/msg00696.html
Content-length: 2326
Hi there,
this is easily solved by applying the correct syntax, but I thought I'd
let you know about an ICE on incorrect syntax anyway. This is with the
2.95 snapshot of 1999-06-15. The code in question is:
--------------------------------------------------------
template <typename number, typename Compare>
void foo (number, Compare);
struct X {
template <typename number> static bool check (const number x1);
void test ();
};
void X::test ()
{
float a;
// foo (a, &X::check); // no matching function
foo (a, &X::check<float>); // internal compiler error
// foo (a, &check); // address of non-static member function
// foo (a, &check<float>); // internal compiler error
// foo (a, &X::template check<float>); // ok
// foo (a, &template check<float>); // parse error
};
--------------------------------------------------------
Depending on which line you comment out, you get the different error
messages. The original question arose because I wanted to omit the scope
qualification X:: because we are in that scope. egcs 1.1.2 by the way
accepted line 4 which now gives an ICE. The error message of line 3 is
particularly misleading since I didn't request a static function's
address, the template parameter of 'foo' should take everything.
Anyway, many thanks for egcs! As long as ICE's can be resolved as simple
as here (by writing the correct syntax) I am happy to accept them, and I
found there to be very few on correct code. Great!
Best regards
Wolfgang
-------------------------------------------------------------------------
Wolfgang Bangerth email: wolfgang.bangerth@iwr.uni-heidelberg.de
www: http://gaia.iwr.uni-heidelberg.de/~wolf
-OUTPUT---------------------------------------
deal.II/source> c++ -c basic/a.cc -o /dev/null
basic/a.cc: In method `void X::test()':
basic/a.cc:15: Internal compiler error.
basic/a.cc:15: Please submit a full bug report to `egcs-bugs@egcs.cygnus.com'.
basic/a.cc:15: See <URL: http://egcs.cygnus.com/faq.html#bugreport > for details.
-VERSION--------------------------------------
deal.II/source> c++ -v
Reading specs from
/usr/local/gcc/egcs-ss-19990616/lib/gcc-lib/sparc-sun-solaris2.6/gcc-2.95/specs
gcc version gcc-2.95 19990615 (prerelease)
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~1999-06-30 23:07 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
1999-06-30 23:07 bug in new ia32 backend Mike Stump
1999-06-30 23:07 ` Richard Henderson
1999-06-22 12:09 ` John S. Dyson
1999-06-30 23:07 ` Toon Moene
1999-06-30 23:07 ` Kudos about ia32 stuff so far John S. Dyson
-- strict thread matches above, loose matches on Subject: below --
1999-06-30 23:07 bug in new ia32 backend Mike Stump
1999-06-28 16:12 Mike Stump
1999-06-30 23:07 ` Richard Henderson
1999-06-28 13:31 Mike Stump
1999-06-24 16:14 Mike Stump
1999-06-30 23:07 ` Jeffrey A Law
1999-06-30 23:07 ` Richard Henderson
1999-06-30 23:07 ` Toon Moene
1999-06-22 12:12 Mike Stump
1999-06-21 19:19 Mike Stump
1999-06-30 23:07 ` Richard Henderson
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