From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7388 invoked by alias); 19 Aug 2003 20:04:05 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 7378 invoked by uid 48); 19 Aug 2003 20:04:05 -0000 Date: Tue, 19 Aug 2003 20:04:00 -0000 Message-ID: <20030819200405.7377.qmail@sources.redhat.com> From: "martin at netbsd dot org" To: gcc-bugs@gcc.gnu.org In-Reply-To: <20030818124133.11965.jk@tools.de> References: <20030818124133.11965.jk@tools.de> Reply-To: gcc-bugzilla@gcc.gnu.org Subject: [Bug c/11965] On SPARC, gcc produces invalid assembler code for a shift << 32 operation X-Bugzilla-Reason: CC X-SW-Source: 2003-08/txt/msg02105.txt.bz2 List-Id: PLEASE REPLY TO gcc-bugzilla@gcc.gnu.org ONLY, *NOT* gcc-bugs@gcc.gnu.org. http://gcc.gnu.org/bugzilla/show_bug.cgi?id=11965 martin at netbsd dot org changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |martin at netbsd dot org ------- Additional Comments From martin at netbsd dot org 2003-08-19 20:04 ------- Forgot to mention: I used gcc version 3.3.1. I initially left out the 32bit changes (since that cases currently seem to not be triggered), but Ian L. Taylor told me you can not rely on that and pointed to the mips backends way of handling it.