[Bug optimization/13951] [tree-ssa] cselib ICE during x86-64 kernel compile with treessa

["jh at suse dot cz" <gcc-bugzilla@gcc.gnu.org>]

------- Additional Comments From jh at suse dot cz  2004-02-04 23:56 -------
Subject: Re:  [tree-ssa] cselib ICE during  x86-64 kernel compile with treessa

> > 
> > ------- Additional Comments From jh at suse dot cz  2004-02-04 12:11 -------
> > Subject: Re:  [tree-ssa] cselib ICE during  x86-64 kernel compile with treessa
> > 
> > > 
> > > ------- Additional Comments From rth at gcc dot gnu dot org  2004-02-04 03:34 -------
> > > Jan, I assume this is some bit of cselib changes present on mainline that
> > > didn't make it to the branch.  Would you take care of it please?
> > 
> > I think it is unrelated - nothing of my recent changes shall affect
> > something else than schedule-ebbs used only by IA-64, but I plan to look
> > into it soon (once I resolve the remaining cgraphunit merge issues)
> The problem is:
> 
> (insn 154 153 155 13 (parallel [
>             (set (reg/v:SI 74 [ eax ])
>                 (asm_operands:SI ("cpuid") ("=a") 0 [
>                         (reg:SI 108)
>                     ]
>                      [  
>                         (asm_input:SI ("0"))
>                     ] ("include/asm/msr.h") 72))
>             (set (reg/v:SI 73 [ dummy ])
>                 (asm_operands:SI ("cpuid") ("=b") 1 [
>                         (reg:SI 108)
>                     ]
>                      [  
>                         (asm_input:SI ("0"))
>                     ] ("include/asm/msr.h") 72))
>             (set (reg/v:SI 73 [ dummy ])
>                 (asm_operands:SI ("cpuid") ("=c") 2 [
>                         (reg:SI 108)
>                     ]
>                      [  
>                         (asm_input:SI ("0"))
>                     ] ("include/asm/msr.h") 72))
>             (set (reg:SI 107)
>                 (asm_operands:SI ("cpuid") ("=d") 3 [
>                         (reg:SI 108)
>                     ]
>                      [  
>                         (asm_input:SI ("0"))
>                     ] ("include/asm/msr.h") 72))
>             (clobber (reg:QI 19 dirflag))
>             (clobber (reg:QI 18 fpsr))
>             (clobber (reg:QI 17 flags))
>         ]) -1 (nil)
>     (nil))
> 
> I think CSELIB ICE because dummy is set twice.  I think it makes sense
> to do so, but I am unsure where to avoid it.  I will look into it
> tomorrow.

Hi,
I am testing the attached patch.
Honza
Index: stmt.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/stmt.c,v
retrieving revision 1.267.2.45
diff -c -3 -p -r1.267.2.45 stmt.c
*** stmt.c	30 Jan 2004 13:14:16 -0000	1.267.2.45
--- stmt.c	4 Feb 2004 23:55:36 -0000
*************** expand_asm_operands (tree string, tree o
*** 1671,1676 ****
--- 1671,1694 ----
  	}
        output_rtx[i] = op;
  
+       if ((REG_P (output_rtx[i]) || GET_CODE (output_rtx[i]) == SUBREG)
+ 	  && !real_output_rtx[i])
+ 	{
+ 	  int y;
+ 	  rtx reg = output_rtx[i];
+ 	  if (GET_CODE (reg) == SUBREG)
+ 	    reg = SUBREG_REG (reg);
+ 	  for (y = 0; y < i; y++)
+ 	    if ((REG_P (output_rtx[y]) || GET_CODE (output_rtx[y]) == SUBREG)
+ 		&& reg_overlap_mentioned_p (reg, output_rtx[y]))
+ 	      break;
+ 	  if (y != i)
+ 	    {
+ 	      real_output_rtx[i] = output_rtx[i];
+ 	      output_rtx[i] = gen_reg_rtx (GET_MODE (op));
+ 	    }
+ 	}
+ 
        generating_concat_p = old_generating_concat_p;
  
        if (is_inout)


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=13951