[Bug optimization/6585] Redundant store/load instruction pairs on ix86

["kazu at cs dot umass dot edu" <gcc-bugzilla@gcc.gnu.org>]

------- Additional Comments From kazu at cs dot umass dot edu  2004-03-17 08:03 -------
With -O3 -fnew-ra -march=i686 -mtune=i686 -fomit-frame-pointer, I get:

mul:
	subl	$20, %esp
	movl	%esi, 12(%esp)	; save %esi
	movl	24(%esp), %eax
	movl	32(%esp), %esi
	movl	28(%esp), %ecx
	movl	%edi, 16(%esp)	; save %edi
	movl	36(%esp), %edi
	movl	%eax, (%esp)
	mull	%esi
	movl	%ecx, 4(%esp)
	movl	%ebx, 8(%esp)
	movl	%eax, %ecx
	movl	(%esp), %eax
	imull	%eax, %edi
	movl	4(%esp), %eax
	imull	%esi, %eax
	movl	12(%esp), %esi	; restore %esi
	leal	(%edx,%edi), %edi
	leal	(%edi,%eax), %ebx
	movl	16(%esp), %edi	; restore %edi
	movl	%ecx, %eax
	movl	%ebx, %edx
	movl	8(%esp), %ebx	; restore %ebx
	addl	$20, %esp
	ret

Note that those "why not" instructions are gone.
"USELESS" instructions are gone even without -fnew-ra as of today's mainline.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=6585