From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21751 invoked by alias); 18 Mar 2004 13:37:34 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 21742 invoked by uid 48); 18 Mar 2004 13:37:33 -0000 Date: Thu, 18 Mar 2004 13:37:00 -0000 Message-ID: <20040318133733.21741.qmail@sources.redhat.com> From: "chbchb1130 at sina dot com" To: gcc-bugs@gcc.gnu.org In-Reply-To: <20040318131233.14631.chbchb1130@sina.com> References: <20040318131233.14631.chbchb1130@sina.com> Reply-To: gcc-bugzilla@gcc.gnu.org Subject: [Bug c/14631] common subexpression elimilation error with sse2 instrinsic _mm_insert_epi16 X-Bugzilla-Reason: CC X-SW-Source: 2004-03/txt/msg02194.txt.bz2 List-Id: ------- Additional Comments From chbchb1130 at sina dot com 2004-03-18 13:37 ------- (In reply to comment #0) > when gcc do cse with my sse2 program,it eliminate the RTL generate by > _mm_insert_epi16 mistakenly. (In reply to comment #1) > Created an attachment (id=5940) --> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=5940&action=view) > preprocessed testcase > when I turn on the -O optimization swith,I get the wrong result: > 65535 65535 65535 65535 65535 65535 65535 65535 > 0 0 0 0 0 0 0 0 > 65535 65535 65535 65535 65535 65535 65535 65535 > the correct result is : > 65535 65535 65535 65535 65535 65535 65535 65535 > 0 65535 65535 65535 65535 65535 65535 65535 > 65535 65535 65535 65535 65535 65535 65535 65535 if I modify the pattern of sse2_pinsrw in i386.md :22089 from vector_merge to unspec, the bug is fixed. initial version: (define_insn "sse2_pinsrw" [(set (match_operand:V8HI 0 "register_operand" "=x") (vec_merge:V8HI (match_operand:V8HI 1 "register_operand" "0") (vec_duplicate:V8HI (truncate:HI (match_operand:SI 2 "nonimmediate_operand" "rm"))) (match_operand:SI 3 "const_0_to_255_operand" "N")))] "TARGET_SSE2" "pinsrw\t{%3, %2, %0|%0, %2, %3}" [(set_attr "type" "ssecvt") (set_attr "mode" "TI")]) modified version: (define_insn "sse2_pinsrw" [(set (match_operand:V8HI 0 "register_operand" "=x") (unspec:V8HI (match_operand:V8HI 1 "register_operand" "0") (vec_duplicate:V8HI (truncate:HI (match_operand:SI 2 "nonimmediate_operand" "rm"))) (match_operand:SI 3 "const_0_to_255_operand" "N")))] "TARGET_SSE2" "pinsrw\t{%3, %2, %0|%0, %2, %3}" [(set_attr "type" "ssecvt") (set_attr "mode" "TI")]) -- What |Removed |Added ---------------------------------------------------------------------------- Status|UNCONFIRMED |RESOLVED Resolution| |FIXED http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14631