From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 15464 invoked by alias); 15 May 2004 16:17:51 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 15452 invoked by uid 48); 15 May 2004 16:17:50 -0000 Date: Sun, 16 May 2004 18:42:00 -0000 Message-ID: <20040515161750.15451.qmail@sourceware.org> From: "pinskia at gcc dot gnu dot org" To: gcc-bugs@gcc.gnu.org In-Reply-To: <20040515153712.15464.coyote@coyotegulch.com> References: <20040515153712.15464.coyote@coyotegulch.com> Reply-To: gcc-bugzilla@gcc.gnu.org Subject: [Bug rtl-optimization/15464] ICE: unable to find a register to spill in class `DREG' X-Bugzilla-Reason: CC X-SW-Source: 2004-05/txt/msg01633.txt.bz2 List-Id: ------- Additional Comments From pinskia at gcc dot gnu dot org 2004-05-15 16:17 ------- Confirmed, known problem in x86, -fschedule-insns schedule instructions before register allocation which is known to ICE on x86. -- What |Removed |Added ---------------------------------------------------------------------------- BugsThisDependsOn| |9085 Status|UNCONFIRMED |NEW Component|c |rtl-optimization Ever Confirmed| |1 Keywords| |ice-on-valid-code Last reconfirmed|0000-00-00 00:00:00 |2004-05-15 16:17:49 date| | http://gcc.gnu.org/bugzilla/show_bug.cgi?id=15464