From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30159 invoked by alias); 11 Oct 2004 11:55:29 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 30150 invoked by uid 48); 11 Oct 2004 11:55:28 -0000 Date: Mon, 11 Oct 2004 11:55:00 -0000 Message-ID: <20041011115528.30147.qmail@sourceware.org> From: "bruno at clisp dot org" To: gcc-bugs@gcc.gnu.org In-Reply-To: <20020506130600.6585.bruno@clisp.org> References: <20020506130600.6585.bruno@clisp.org> Reply-To: gcc-bugzilla@gcc.gnu.org Subject: [Bug rtl-optimization/6585] Redundant store/load instruction pairs on ix86 X-Bugzilla-Reason: CC X-SW-Source: 2004-10/txt/msg01386.txt.bz2 List-Id: ------- Additional Comments From bruno at clisp dot org 2004-10-11 11:55 ------- This result is even better: shorter than the previous ones, and there are no useless moves between registers any more. However, there are more useless moves from register to stack slot and back from stack slot to register. They could be eliminated. Commented listing: mul: subl $20, %esp movl 32(%esp), %ecx b0 movl 24(%esp), %eax a0 movl %ebx, 8(%esp) ; save %ebx movl 36(%esp), %ebx b1 movl %edi, 12(%esp) ; save %edi movl 24(%esp), %edi a0 movl %ebp, 16(%esp) ; save %ebp mull %ecx %edx:%eax := a0*b0 imull 28(%esp), %ecx a1*b0 imull %ebx, %edi a0*b1 movl 8(%esp), %ebx ; restore %ebx movl %edx, %ebp hi movl %eax, (%esp) USELESS! addl %edi, %ebp hi+a0*b1 movl (%esp), %eax USELESS! leal (%ebp,%ecx), %ecx hi+a0*b1+a1*b0 COULD GO INTO %edx DIRECTLY movl 12(%esp), %edi ; restore %edi movl %ecx, 4(%esp) USELESS! movl 16(%esp), %ebp ; restore %ebp movl 4(%esp), %edx USELESS! addl $20, %esp ret -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=6585