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Date: Sun, 17 Oct 2004 17:01:00 -0000
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From: "pinskia at gcc dot gnu dot org" <gcc-bugzilla@gcc.gnu.org>
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Subject: [Bug middle-end/18041] OR of two single-bit bitfields is inefficient
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------- Additional Comments From pinskia at gcc dot gnu dot org  2004-10-17 17:01 -------
Hmm, there is only one load on PPC (with either side):
same bit layout as below:
        lwz r0,0(r3)
        rlwinm r2,r0,0,31,31
        rlwinm r9,r0,31,31,31
        or r2,r2,r9
        rlwimi r0,r2,0,31,31
        stw r0,0(r3)
        blr
The oposite bit layout:
        lwz r0,0(r3)
        srwi r2,r0,31
        rlwinm r9,r0,2,31,31
        or r2,r2,r9
        rlwimi r0,r2,31,0,0
        stw r0,0(r3)
        blr

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18041