From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 24318 invoked by alias); 25 Nov 2004 22:44:28 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 24197 invoked by uid 48); 25 Nov 2004 22:44:19 -0000 Date: Thu, 25 Nov 2004 22:44:00 -0000 Message-ID: <20041125224419.24196.qmail@sourceware.org> From: "rth at gcc dot gnu dot org" To: gcc-bugs@gcc.gnu.org In-Reply-To: <20041124011632.18641.fjahanian@apple.com> References: <20041124011632.18641.fjahanian@apple.com> Reply-To: gcc-bugzilla@gcc.gnu.org Subject: [Bug middle-end/18641] [4.0 Regression] Another ICE caused by reload of a psuedo reg into f0 for a DImode expr X-Bugzilla-Reason: CC X-SW-Source: 2004-11/txt/msg03134.txt.bz2 List-Id: ------- Additional Comments From rth at gcc dot gnu dot org 2004-11-25 22:44 ------- Then I think that we have to assume that the result of L_R_A is not offsettable. Even in the case of rs6000, I believe the definition is only *usually* offsettable, but that this is not a 100% iron-clad guarantee. In particular, an offset like 0x17fff would get rendered as 0x10000 + 0x7fff, and there's no room left in the low part for any further offsetting. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=18641