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Date: Fri, 24 Dec 2004 06:25:00 -0000
From: "amodra at bigpond dot net dot au" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Message-ID: <20041224062552.19147.amodra@bigpond.net.au>
Reply-To: gcc-bugzilla@gcc.gnu.org
Subject: [Bug target/19147] New: invalid rlwinm patterns
X-Bugzilla-Reason: CC
X-SW-Source: 2004-12/txt/msg03451.txt.bz2
List-Id: <gcc-bugs.sourceware.org>

andsi3_internal7 and andsi3_internal8 generate invalid LT and GT condition
codes.  This is because these bits of the condition register are set from
all 64 bits of the register in 64-bit mode.  I don't believe it is possible
to have all of EQ, LT and GT correct using only two rlwinm instructions in
the mask_operand_wrap case.

Causes failure of gcc.c-torture/execute/930718-1.c

-- 
           Summary: invalid rlwinm patterns
           Product: gcc
           Version: 4.0.0
            Status: UNCONFIRMED
          Keywords: wrong-code
          Severity: critical
          Priority: P2
         Component: target
        AssignedTo: amodra at bigpond dot net dot au
        ReportedBy: amodra at bigpond dot net dot au
                CC: gcc-bugs at gcc dot gnu dot org
GCC target triplet: powerpc64-*-linux


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19147