From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26935 invoked by alias); 25 Dec 2004 21:57:01 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 26891 invoked by alias); 25 Dec 2004 21:56:58 -0000 Date: Sat, 25 Dec 2004 21:57:00 -0000 Message-ID: <20041225215658.26890.qmail@sourceware.org> From: "schlie at comcast dot net" To: gcc-bugs@gcc.gnu.org In-Reply-To: <20041225202132.19154.schlie@comcast.net> References: <20041225202132.19154.schlie@comcast.net> Reply-To: gcc-bugzilla@gcc.gnu.org Subject: [Bug middle-end/19154] miss-optimization of (x & pow2C) avr conditionals returning bool equivalent values X-Bugzilla-Reason: CC X-SW-Source: 2004-12/txt/msg03535.txt.bz2 List-Id: ------- Additional Comments From schlie at comcast dot net 2004-12-25 21:56 ------- Subject: Re: miss-optimization of (x & pow2C) avr conditionals returning bool equivalent values I apologize, I'm confused, what are you comparing to what? (are you using 4.0, which to my knowledge only builds with my recent proposed patches, unless the problem was fixed otherwise?) - to my understanding, (x & C) should never result in ((x >> C') & 1) presented to the backend, as it's purely a target specific optimization. > From: pinskia at gcc dot gnu dot org > ------- Additional Comments From pinskia at gcc dot gnu dot org 2004-12-25 > 20:57 ------- > Take: > char g(char c) > { > return (c & (1 << 3)) != 0; > } > > (insn 8 4 30 (set (reg:HI 24 r24 [orig:44 c ] [44]) > (sign_extend:HI (reg:QI 24 r24 [ c ]))) 81 {extendqihi2} (nil) > (nil)) > > (insn 30 8 11 (parallel [ > (set (reg:HI 24 r24 [orig:44 c ] [44]) > (lshiftrt:HI (reg:HI 24 r24 [orig:44 c ] [44]) > (const_int 3 [0x3]))) > (clobber (reg:QI 19 r19)) > ]) 70 {*lshrhi3_const} (nil) > (expr_list:REG_UNUSED (reg:QI 19 r19) > (expr_list:REG_UNUSED (reg:QI 25 r25) > (nil)))) > > (insn 11 30 12 (set (reg:HI 24 r24 [46]) > (sign_extend:HI (reg:QI 24 r24 [47]))) 81 {extendqihi2} > (insn_list:REG_DEP_TRUE 10 (nil)) > (nil)) > (insn 19 16 25 (parallel [ > (set (reg/i:HI 24 r24 [ ]) > (and:HI (reg:HI 24 r24 [46]) > (const_int 1 [0x1]))) > (clobber (scratch:QI)) > ]) 47 {andhi3} (insn_list:REG_DEP_TRUE 11 (nil)) > (expr_list:REG_UNUSED (scratch:QI) > (nil))) > > > Which looks good if the rtl matches up one to one per instruction but since > avr is not like that we get a > werid interaction. > > -- > What |Removed |Added > ---------------------------------------------------------------------------- > Status|UNCONFIRMED |NEW > Ever Confirmed| |1 > Last reconfirmed|0000-00-00 00:00:00 |2004-12-25 20:57:17 > date| | > > > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19154 > > ------- You are receiving this mail because: ------- > You reported the bug, or are watching the reporter. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19154