[Bug target/19329] New: [3.4 Regression] Miscompilation with bitfields

[Bug target/19329] New: [3.4 Regression] Miscompilation with bitfields

[giovannibajo at libero dot it]

The testcase I'm going to attach generates a miscompilation on the 3.4 branch. 
The bug cannot be reproduced on 4.0 but might actually be latent there.

The code it's copying 4 1-bit fields from one structure to a different one. The 
internal bit offsets of the fields are different by just one bit between the 
two structures.

This is an except of the generate code:

	lsl r18   # source bitfield disposition is 1bit 
                  # shifited compared to the original, so GCC
                  # adjust it
	andi r24,lo8(-25)   # clear bits it's going to write
	mov r25,r18
	clr r25             # *BUG* it will always write zero
                            # instead of copying the value
	andi r25,lo8(16)
	andi r18,lo8(8)
	or r24,r18          # write correct bit
	or r24,r25          # write zero (sigh!)

-- 
           Summary: [3.4 Regression] Miscompilation with bitfields
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Keywords: wrong-code
          Severity: normal
          Priority: P2
         Component: target
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: giovannibajo at libero dot it
                CC: aleph at develer dot com,bernie at develer dot com,gcc-
                    bugs at gcc dot gnu dot org,sayle at gcc dot gnu dot org
GCC target triplet: avr-elf


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[giovannibajo at libero dot it]

------- Additional Comments From giovannibajo at libero dot it  2005-01-08 17:47 -------
Created an attachment (id=7898)
 --> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=7898&action=view)
Testcase to reproduce the bug


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[giovannibajo at libero dot it]

------- Additional Comments From giovannibajo at libero dot it  2005-01-08 17:48 -------
Created an attachment (id=7899)
 --> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=7899&action=view)
Generated assembly code (with bug!)


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[giovannibajo at libero dot it]

------- Additional Comments From giovannibajo at libero dot it  2005-01-08 17:50 -------
Compiler details:

Reading specs from /usr/local/avr/lib/gcc/avr/3.4.2/specs
Configured with: ../gcc-3.4.2/configure --host=i686-pc-linux-gnu --
prefix=/usr/local/avr --target=avr --enable-languages=c : (reconfigured) ../gcc-
3.4.2/configure --host=i686-pc-linux-gnu --prefix=/usr/local/avr --target=avr --
enable-languages=c,c++
Thread model: single
gcc version 3.4.2


-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|normal                      |critical
      Known to fail|                            |3.4.2
      Known to work|                            |4.0.0
   Target Milestone|---                         |3.4.4
            Version|unknown                     |3.4.2


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[bernie at develer dot com]

------- Additional Comments From bernie at develer dot com  2005-01-08 17:57 -------
Also fails with this pre-release version: 
 
avr-gcc (GCC) 3.4.3 20041019 (prerelease) 
Copyright (C) 2004 Free Software Foundation, Inc. 
This is free software; see the source for copying conditions.  There is NO 
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 
 
Bootstrapping today's mainline right now. 
 

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to fail|3.4.2                       |3.4.2 3.4.3


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[pinskia at gcc dot gnu dot org]

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |pinskia at gcc dot gnu dot
                   |                            |org


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[pinskia at gcc dot gnu dot org]

------- Additional Comments From pinskia at gcc dot gnu dot org  2005-01-08 18:52 -------
        clr r25  ;  46  ashlqi3/4       [length = 1]

(insn 46 65 49 (set (reg:QI 25 r25 [66])
        (ashift:QI (reg:QI 25 r25 [66])
            (const_int 0 [0x0]))) 57 {ashlqi3} (nil)
    (nil))

So there are two problems here, one a target problem in that it should not be generating a clr for this 
insn.  Two this insn should not be here but that just a misoptimization.

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|critical                    |normal
             Status|UNCONFIRMED                 |NEW
     Ever Confirmed|                            |1
           Priority|P2                          |P3
   Last reconfirmed|0000-00-00 00:00:00         |2005-01-08 18:52:50
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[giovannibajo at libero dot it]

------- Additional Comments From giovannibajo at libero dot it  2005-01-08 19:17 -------
Bernardo's working on a patch.

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
         AssignedTo|unassigned at gcc dot gnu   |bernie at develer dot com
                   |dot org                     |
             Status|NEW                         |ASSIGNED


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[pinskia at gcc dot gnu dot org]

------- Additional Comments From pinskia at gcc dot gnu dot org  2005-01-08 21:19 -------
The shift with zero comes from regmove.

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[pinskia at gcc dot gnu dot org]

------- Additional Comments From pinskia at gcc dot gnu dot org  2005-01-09 02:13 -------
Patch posted here: <http://gcc.gnu.org/ml/gcc-patches/2005-01/msg00454.html>.

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |patch


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[bjoern dot m dot haase at web dot de]

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------- Additional Comments From bjoern dot m dot haase at web dot de  2005-01-18 23:35 -------
I have the impression that Bug #19329 is the same as bug #19239 (as one might 
think already when looking at the similarity of the numbers :-) ) 19239, 
howeverr  so far has addressed the issue of *negative* and other really illegal 
shift counts. In a patch treating both problems correctly, one should possibly 
implement both: 
 
Treatment of negative and other illegal shift counts and positive shift counts. 
 
Yours, 
 
Björn. 
 

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[bjoern dot m dot haase at web dot de]

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------- Additional Comments From bjoern dot m dot haase at web dot de  2005-01-18 23:43 -------
Sorry for this: 
 
In my posting above, I have misspelled the bug number. I wanted to refer you 
to bug #19293 (and not #19239, luckyly the number of possible permutations is 
countable). 
 
By the way at #19293, you will also find a patch suggestion that should be 
eaysily adapted to all of the present shifting problems. 
 
Yours again, 
 
Björn 

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug target/19329] [3.4 Regression] Miscompilation with bitfields

[bernie at develer dot com]

------- Additional Comments From bernie at develer dot com  2005-01-19 00:03 -------
(In reply to comment #11)

> By the way at #19293, you will also find a patch suggestion that should be 
> eaysily adapted to all of the present shifting problems. 

I agree PR19293 is a superset of this bug, so I'll
close it and withdraw my (already approved) patch.

Could you update your patch with a test for <= 0?
Please post it in gcc-patches, with me and
Marek Michalkiewicz <marekm@amelek.gda.pl> in Cc.

I will take care to install your patch in CVS as
soon as it gets approved.


*** This bug has been marked as a duplicate of 19293 ***

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|                            |DUPLICATE


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug middle-end/19329] [3.4 Regression] Miscompilation with bitfields

[bernie at develer dot com]

------- Additional Comments From bernie at develer dot com  2005-01-19 00:06 -------
Oops, I forgot this bug should stay open until someone
figures out why GCC 3.4 leaks through insns with a 0
shift count.

I've reclassified the bug as affecting the middle-end.


-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|RESOLVED                    |REOPENED
          Component|target                      |middle-end
         Resolution|DUPLICATE                   |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug middle-end/19329] [3.4 Regression] Bitfield operations cause shifts with 0-count to slip through backends

[bernie at develer dot com]

------- Additional Comments From bernie at develer dot com  2005-01-19 00:11 -------
I'm no longer in charge for this bug.

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
         AssignedTo|bernie at develer dot com   |unassigned at gcc dot gnu
                   |                            |dot org
             Status|REOPENED                    |NEW


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug middle-end/19329] [3.4 Regression] Bitfield operations cause shifts with 0-count to slip through backends

[pinskia at gcc dot gnu dot org]

------- Additional Comments From pinskia at gcc dot gnu dot org  2005-01-19 00:12 -------
(In reply to comment #8)
> The shift with zero comes from regmove.
Well I did figure out where the shift with zero came from see above but why it comes about I don't 
know.

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug middle-end/19329] [3.4 Regression] Bitfield operations cause shifts with 0-count to slip through backends

[cvs-commit at gcc dot gnu dot org]

------- Additional Comments From cvs-commit at gcc dot gnu dot org  2005-01-26 21:44 -------
Subject: Bug 19329

CVSROOT:	/cvs/gcc
Module name:	gcc
Changes by:	marekm@gcc.gnu.org	2005-01-26 21:44:26

Modified files:
	gcc            : ChangeLog 
	gcc/config/avr : avr.c avr.md 

Log message:
	PR target/19293
	PR target/19329
	* config/avr/avr.c (notice_update_cc): Only set condition code for
	ashrqi3 if shift count > 0.
	(out_shift_with_cnt): Handle shift count <= 0 as a no-op.
	(ashlqi3_out, ashlhi3_out, ashlsi3_out, ashrqi3_out, ashrhi3_out,
	ashrsi3_out, lshrqi3_out, lshrhi3_out, lshrsi3_out): Handle shift
	count <= 0 as a no-op, and shift count >= width by copying zero
	or sign bit to all bits of the result.
	* config/avr/avr.md (all shifts): Add alternatives for zero shift
	count, with attribute "length" set to 0 and "cc" set to "none".

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&r1=2.7290&r2=2.7291
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/avr/avr.c.diff?cvsroot=gcc&r1=1.127&r2=1.128
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/avr/avr.md.diff?cvsroot=gcc&r1=1.47&r2=1.48



-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug middle-end/19329] [3.4 Regression] Bitfield operations cause shifts with 0-count to slip through backends

[cvs-commit at gcc dot gnu dot org]

------- Additional Comments From cvs-commit at gcc dot gnu dot org  2005-01-27 22:36 -------
Subject: Bug 19329

CVSROOT:	/cvs/gcc
Module name:	gcc
Branch: 	gcc-3_4-branch
Changes by:	marekm@gcc.gnu.org	2005-01-27 22:36:00

Modified files:
	gcc            : ChangeLog 
	gcc/config/avr : avr.c avr.md 

Log message:
	PR target/19293
	PR target/19329
	* config/avr/avr.c (notice_update_cc): Only set condition code for
	ashrqi3 if shift count > 0.
	(out_shift_with_cnt): Handle shift count <= 0 as a no-op.
	(ashlqi3_out, ashlhi3_out, ashlsi3_out, ashrqi3_out, ashrhi3_out,
	ashrsi3_out, lshrqi3_out, lshrhi3_out, lshrsi3_out): Handle shift
	count <= 0 as a no-op, and shift count >= width by copying zero
	or sign bit to all bits of the result.
	* config/avr/avr.md (all shifts): Add alternatives for zero shift
	count, with attribute "length" set to 0 and "cc" set to "none".

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=2.2326.2.785&r2=2.2326.2.786
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/avr/avr.c.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=1.108.4.3&r2=1.108.4.4
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/avr/avr.md.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=1.42.4.1&r2=1.42.4.2



-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug middle-end/19329] [3.4 Regression] Bitfield operations cause shifts with 0-count to slip through backends

[giovannibajo at libero dot it]

------- Additional Comments From giovannibajo at libero dot it  2005-03-09 17:17 -------
Marek, is this bug fixed then? Can we close it?

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
         AssignedTo|unassigned at gcc dot gnu   |marekm at gcc dot gnu dot
                   |dot org                     |org
             Status|NEW                         |ASSIGNED


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug middle-end/19329] [3.4 Regression] Bitfield operations cause shifts with 0-count to slip through backends

[marekm at amelek dot gda dot pl]

------- Additional Comments From marekm at amelek dot gda dot pl  2005-03-09 17:55 -------
(In reply to comment #18)  
> Marek, is this bug fixed then? Can we close it?  
  
Fixed for the AVR, but the middle-end may still generate these "shift by 0"  
insns - not sure if all other targets handle them correctly. 
 

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329

[Bug middle-end/19329] [3.4 Regression] Bitfield operations cause shifts with 0-count to slip through backends

[giovannibajo at libero dot it]

------- Additional Comments From giovannibajo at libero dot it  2005-03-14 09:36 -------
Fixed then.

Roger, do you believe that middle-end is right in generating these shifts by 
zero? If you believe it is a bug, we can open a new bugreport to track it.

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|                            |FIXED


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19329