[Bug inline-asm/19979] New: Invalid register allocation (%sil, %dil)

[Bug inline-asm/19979] New: Invalid register allocation (%sil, %dil)

[xnavara at volny dot cz]

Sometimes the %sil/%dil AMD64 registers are allocated for inline assembler. The
smallest reproducible test case I found is the following code:

int test()
{
   register unsigned char a = 1, b = 2, c = 3, d = 4, e = 5, f = 6;
   __asm__ __volatile__ (
      "movb %0, %1\n"
      "movb %2, %3\n"
      "movb %4, %5\n" : :
      "r" (a), "r" (b), "r" (c), "r" (d),
      "r" (e), "r" (f) );
}
 
int main()
{
   test();
}

which correctly reports compilation error when no -O level is specified, but
when -O1, -O2 or -O3 is used (eg. "gcc -O2 -c test.c") the %sil, %dil registers
are incorrectly allocated and the assembling of the object fails.

Tested with

Reading specs from d:/mingw/bin/../lib/gcc/mingw32/3.4.1/specs
Configured with: ../gcc/configure --with-gcc --with-gnu-ld --with-gnu-as
--host=mingw32 --target=mingw32 --prefix=/mingw --enable-threads --disable-nls
--enable-languages=c,c++,f77,ada,objc,java --disable-win32-registry
--disable-shared --enable-sjlj-exceptions --enable-libgcj --disable-java-awt
--without-x --enable-java-gc=boehm --disable-libgcj-debug --enable-interpreter
--enable-hash-synchronization --enable-libstdcxx-debug
Thread model: win32
gcc version 3.4.1 (mingw special)

Reading specs from E:/DIFFs/gcc/bin/../lib/gcc-lib/mingw32/3.3.1/specs
Configured with: ../gcc/configure --with-gcc --with-gnu-ld --with-gnu-as
--host=mingw32 --target=mingw32 --prefix=/mingw --enable-threads --disable-nls
--enable-languages=c,c++,f77,objc,ada,java --disable-win32-registry
--disable-shared --enable-sjlj-exceptions --enable-libgcj --disable-java-awt
--without-x --enable-java-gc=boehm --disable-libgcj-debug --enable-interpreter
--enable-hash-synchronization
Thread model: win32
gcc version 3.3.1 (mingw special 20030804-1)

-- 
           Summary: Invalid register allocation (%sil, %dil)
           Product: gcc
           Version: 3.4.1
            Status: UNCONFIRMED
          Severity: normal
          Priority: P2
         Component: inline-asm
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: xnavara at volny dot cz
                CC: gcc-bugs at gcc dot gnu dot org
 GCC build triplet: i686-pc-mingw32
  GCC host triplet: i686-pc-mingw32
GCC target triplet: i686-pc-mingw32


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19979

[Bug inline-asm/19979] Invalid register allocation (%sil, %dil)

[pinskia at gcc dot gnu dot org]

------- Additional Comments From pinskia at gcc dot gnu dot org  2005-02-15 19:10 -------
"I'm of the opinion that the source is invalid.  Using a "=q" constraint
instead of an "=r" constraint properly shows that the compiler must choose
one of the four "low byte" registers."

This is a dup of bug 10153.

*** This bug has been marked as a duplicate of 10153 ***

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|                            |DUPLICATE


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19979