[Bug target/20814] New: ICE in extract_insn for test vmx/varargs-1.c

[Bug target/20814] New: ICE in extract_insn for test vmx/varargs-1.c

[janis at gcc dot gnu dot org]

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Current GCC mainline gets an ICE on powerpc64-linux building the
test gcc.dg/vmx/varargs-1.c:
                                                                                
elm3b149% /home/janis/tools/gcc-mline-20050407/bin/gcc -m64 -O3 -maltivec
varargs-1.c
varargs-1.c: In function ‘f1’:
varargs-1.c:28: error: unrecognizable insn:
(insn 87 36 42 2 (set (reg:DI 10 10)
        (and:DI (reg:DI 9 9 [orig:125 ap.25 ] [125])
            (const_int -16 [0xfffffffffffffff0]))) -1 (nil)
    (nil))
varargs-1.c:28: internal compiler error: in extract_insn, at recog.c:2042
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://gcc.gnu.org/bugs.html> for instructions.
                                                                                
The failure starts with this patch, which might merely uncover a
latent bug:
                                                                                
  http://gcc.gnu.org/ml/gcc-cvs/2005-02/msg01069.html

-- 
           Summary: ICE in extract_insn for test vmx/varargs-1.c
           Product: gcc
           Version: 4.1.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P2
         Component: target
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: janis at gcc dot gnu dot org
                CC: dje at gcc dot gnu dot org,gcc-bugs at gcc dot gnu dot
                    org
 GCC build triplet: powerpc64-linux
  GCC host triplet: powerpc64-linux
GCC target triplet: powerpc64-linux


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20814

[Bug target/20814] ICE in extract_insn for test vmx/varargs-1.c

[dje at watson dot ibm dot com]

------- Additional Comments From dje at watson dot ibm dot com  2005-04-07 22:09 -------
Subject: Re:  New: ICE in extract_insn for test vmx/varargs-1.c 

	Let me know if the appended patch fixes the ICE.  The definition
of the "and" predicates was ignoring CONST_INT that matched predicate
logical_operand.

David

Index: predicates.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/predicates.md,v
retrieving revision 1.10
diff -c -p -r1.10 predicates.md
*** predicates.md	2 Apr 2005 10:46:03 -0000	1.10
--- predicates.md	7 Apr 2005 22:07:33 -0000
***************
*** 531,559 ****
  ;; Return 1 if the operand is either a non-special register or a constant
  ;; that can be used as the operand of a PowerPC64 logical AND insn.
  (define_predicate "and64_operand"
!   (if_then_else (match_code "const_int")
!     (match_operand 0 "mask64_operand")
!     (if_then_else (match_test "fixed_regs[CR0_REGNO]")
!       (match_operand 0 "gpc_reg_operand")
!       (match_operand 0 "logical_operand"))))
  
  ;; Like and64_operand, but also match constants that can be implemented
  ;; with two rldicl or rldicr insns.
  (define_predicate "and64_2_operand"
!   (if_then_else (match_code "const_int")
!     (match_test "mask64_1or2_operand (op, mode, true)")
!     (if_then_else (match_test "fixed_regs[CR0_REGNO]")
!       (match_operand 0 "gpc_reg_operand")
!       (match_operand 0 "logical_operand"))))
  
  ;; Return 1 if the operand is either a non-special register or a
  ;; constant that can be used as the operand of a logical AND.
  (define_predicate "and_operand"
!   (if_then_else (match_code "const_int")
!     (match_operand 0 "mask_operand")
!     (if_then_else (match_test "fixed_regs[CR0_REGNO]")
!       (match_operand 0 "gpc_reg_operand")
!       (match_operand 0 "logical_operand"))))
  
  ;; Return 1 if the operand is a general non-special register or memory operand.
  (define_predicate "reg_or_mem_operand"
--- 531,557 ----
  ;; Return 1 if the operand is either a non-special register or a constant
  ;; that can be used as the operand of a PowerPC64 logical AND insn.
  (define_predicate "and64_operand"
!   (ior (match_operand 0 "mask64_operand")
!        (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! 	 (match_operand 0 "gpc_reg_operand")
! 	 (match_operand 0 "logical_operand"))))
  
  ;; Like and64_operand, but also match constants that can be implemented
  ;; with two rldicl or rldicr insns.
  (define_predicate "and64_2_operand"
!   (ior (and (match_code "const_int")
! 	    (match_test "mask64_1or2_operand (op, mode, true)"))
!        (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! 	 (match_operand 0 "gpc_reg_operand")
! 	 (match_operand 0 "logical_operand"))))
  
  ;; Return 1 if the operand is either a non-special register or a
  ;; constant that can be used as the operand of a logical AND.
  (define_predicate "and_operand"
!   (ior (match_operand 0 "mask_operand")
!        (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! 	 (match_operand 0 "gpc_reg_operand")
! 	 (match_operand 0 "logical_operand"))))
  
  ;; Return 1 if the operand is a general non-special register or memory operand.
  (define_predicate "reg_or_mem_operand"


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20814

[Bug target/20814] ICE in extract_insn for test vmx/varargs-1.c

[janis187 at us dot ibm dot com]

------- Additional Comments From janis187 at us dot ibm dot com  2005-04-07 22:30 -------
Subject: Re:  ICE in extract_insn for test vmx/varargs-1.c

On Thu, Apr 07, 2005 at 10:09:14PM -0000, dje at watson dot ibm dot com wrote:
> 
> ------- Additional Comments From dje at watson dot ibm dot com  2005-04-07 22:09 -------
> Subject: Re:  New: ICE in extract_insn for test vmx/varargs-1.c 
> 
> 	Let me know if the appended patch fixes the ICE.  The definition
> of the "and" predicates was ignoring CONST_INT that matched predicate
> logical_operand.

No, this doesn't affect it.

You ought to be able to debug this using a cross compiler, since all you
need to build is cc1.

Janis


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20814

[Bug target/20814] [4.1 Regression] ICE in extract_insn for test vmx/varargs-1.c

[pinskia at gcc dot gnu dot org]

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |ice-on-valid-code
            Summary|ICE in extract_insn for test|[4.1 Regression] ICE in
                   |vmx/varargs-1.c             |extract_insn for test
                   |                            |vmx/varargs-1.c
   Target Milestone|---                         |4.1.0


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20814

[Bug target/20814] [4.1 Regression] ICE in extract_insn for test vmx/varargs-1.c

[dje at watson dot ibm dot com]

------- Additional Comments From dje at watson dot ibm dot com  2005-04-08 18:57 -------
Subject: Re:  New: ICE in extract_insn for test vmx/varargs-1.c 

	In addition to the previous change, altivec_register_operand needs
to accept SUBREG.

David


Index: predicates.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/predicates.md,v
retrieving revision 1.10
diff -c -p -r1.10 predicates.md
*** predicates.md	2 Apr 2005 10:46:03 -0000	1.10
--- predicates.md	7 Apr 2005 22:07:33 -0000
***************
*** 34,42 ****
    
  ;; Return 1 if op is an Altivec register.
  (define_predicate "altivec_register_operand"
!   (and (match_code "reg")
!        (match_test "ALTIVEC_REGNO_P (REGNO (op))
! 		    || REGNO (op) > LAST_VIRTUAL_REGISTER")))
  
  ;; Return 1 if op is XER register.
  (define_predicate "xer_operand"
--- 34,44 ----
    
  ;; Return 1 if op is an Altivec register.
  (define_predicate "altivec_register_operand"
!   (and (match_code "reg,subreg")
!        (and (match_operand 0 "register_operand")
! 	    (match_test "GET_CODE (op) != REG
! 			 || ALTIVEC_REGNO_P (REGNO (op))
! 			 || REGNO (op) > LAST_VIRTUAL_REGISTER"))))
  
  ;; Return 1 if op is XER register.
  (define_predicate "xer_operand"
***************
*** 531,559 ****
  ;; Return 1 if the operand is either a non-special register or a constant
  ;; that can be used as the operand of a PowerPC64 logical AND insn.
  (define_predicate "and64_operand"
!   (if_then_else (match_code "const_int")
!     (match_operand 0 "mask64_operand")
!     (if_then_else (match_test "fixed_regs[CR0_REGNO]")
!       (match_operand 0 "gpc_reg_operand")
!       (match_operand 0 "logical_operand"))))
  
  ;; Like and64_operand, but also match constants that can be implemented
  ;; with two rldicl or rldicr insns.
  (define_predicate "and64_2_operand"
!   (if_then_else (match_code "const_int")
!     (match_test "mask64_1or2_operand (op, mode, true)")
!     (if_then_else (match_test "fixed_regs[CR0_REGNO]")
!       (match_operand 0 "gpc_reg_operand")
!       (match_operand 0 "logical_operand"))))
  
  ;; Return 1 if the operand is either a non-special register or a
  ;; constant that can be used as the operand of a logical AND.
  (define_predicate "and_operand"
!   (if_then_else (match_code "const_int")
!     (match_operand 0 "mask_operand")
!     (if_then_else (match_test "fixed_regs[CR0_REGNO]")
!       (match_operand 0 "gpc_reg_operand")
!       (match_operand 0 "logical_operand"))))
  
  ;; Return 1 if the operand is a general non-special register or memory operand.
  (define_predicate "reg_or_mem_operand"
--- 533,559 ----
  ;; Return 1 if the operand is either a non-special register or a constant
  ;; that can be used as the operand of a PowerPC64 logical AND insn.
  (define_predicate "and64_operand"
!   (ior (match_operand 0 "mask64_operand")
!        (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! 	 (match_operand 0 "gpc_reg_operand")
! 	 (match_operand 0 "logical_operand"))))
  
  ;; Like and64_operand, but also match constants that can be implemented
  ;; with two rldicl or rldicr insns.
  (define_predicate "and64_2_operand"
!   (ior (and (match_code "const_int")
! 	    (match_test "mask64_1or2_operand (op, mode, true)"))
!        (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! 	 (match_operand 0 "gpc_reg_operand")
! 	 (match_operand 0 "logical_operand"))))
  
  ;; Return 1 if the operand is either a non-special register or a
  ;; constant that can be used as the operand of a logical AND.
  (define_predicate "and_operand"
!   (ior (match_operand 0 "mask_operand")
!        (if_then_else (match_test "fixed_regs[CR0_REGNO]")
! 	 (match_operand 0 "gpc_reg_operand")
! 	 (match_operand 0 "logical_operand"))))
  
  ;; Return 1 if the operand is a general non-special register or memory operand.
  (define_predicate "reg_or_mem_operand"


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20814

[Bug target/20814] [4.1 Regression] ICE in extract_insn for test vmx/varargs-1.c

[janis187 at us dot ibm dot com]

------- Additional Comments From janis187 at us dot ibm dot com  2005-04-08 21:45 -------
Subject: Re:  [4.1 Regression] ICE in extract_insn for test vmx/varargs-1.c

A simple build (C only, no bootstrap, no testsuite run) with the latest
patch passes all of the gcc.dg/vmx tests on powerpc64-linux with -m32
and -m64.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20814

[Bug target/20814] [4.1 Regression] ICE in extract_insn for test vmx/varargs-1.c

[cvs-commit at gcc dot gnu dot org]

------- Additional Comments From cvs-commit at gcc dot gnu dot org  2005-04-08 23:42 -------
Subject: Bug 20814

CVSROOT:	/cvs/gcc
Module name:	gcc
Changes by:	dje@gcc.gnu.org	2005-04-08 23:42:06

Modified files:
	gcc            : ChangeLog 
	gcc/config/rs6000: predicates.md 

Log message:
	PR target/20814
	* config/rs6000/predicates.md (altivec_register_operand): Accept
	SUBREG.
	(and64_operand): Do not limit CONST_INT to mask64_operand.
	(and64_2_operand): Do not limit CONST_INT to mask64_1or2_operand.
	(and_operand): Do not limit CONST_INT to mask_operand.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&r1=2.8202&r2=2.8203
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/rs6000/predicates.md.diff?cvsroot=gcc&r1=1.10&r2=1.11



-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20814

[Bug target/20814] [4.1 Regression] ICE in extract_insn for test vmx/varargs-1.c

[dje at gcc dot gnu dot org]

------- Additional Comments From dje at gcc dot gnu dot org  2005-04-08 23:45 -------
patch committed

-- 
           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|                            |FIXED


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20814