From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31259 invoked by alias); 4 Nov 2005 23:27:24 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 31244 invoked by uid 48); 4 Nov 2005 23:27:22 -0000 Date: Fri, 04 Nov 2005 23:27:00 -0000 Message-ID: <20051104232722.31243.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64 In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "ian at airs dot com" X-SW-Source: 2005-11/txt/msg00699.txt.bz2 List-Id: ------- Comment #8 from ian at airs dot com 2005-11-04 23:27 ------- No, doing the add in v4hi mode is not the same as doing the add in v8qi mode. The carry bits will be handled differently. It's also rather odd that register 81 changed from V4HImode to V8QImode. Normally a pseudo-register always has the same mode, and accessing it in a different mode requires a subreg. -- ian at airs dot com changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |ian at airs dot com http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22432