[Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64

[Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64

[pinskia at gcc dot gnu dot org]

------- Comment #3 from pinskia at gcc dot gnu dot org  2005-10-27 14:44 -------
A regression from 3.4.x and 3.3.x.


-- 

pinskia at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to fail|4.1.0                       |4.1.0 4.0.3
      Known to work|                            |3.4.5 3.3.6
            Summary|Wrong code generation using |[4.0/4.1 Regression] Wrong
                   |MMX intrinsics on amd64     |code generation using MMX
                   |                            |intrinsics on amd64
   Target Milestone|---                         |4.0.3


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22432

[Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64

[pluto at agmk dot net]

------- Comment #4 from pluto at agmk dot net  2005-10-27 16:00 -------
With my patched gcc-4.1.0-20051019 the testcase works.
Applied patches: PR7776, PR20297, PR22429, PR22533, PR23948,
PR19505, PR20606, PR24069, PR24419, PR24172, PR24295, PR20928

[builder2@estel BUILD]$ gcc -Wall -O2 pr22432.c -S -march=x86-64
[builder2@estel BUILD]$ cat pr22432.s
        .file   "pr22432.c"
        .section        .rodata.str1.1,"aMS",@progbits,1
.LC0:   .string "pr22432.c"
.LC1:   .string "a == 0xffffffff"
        .section        .rodata.cst8,"aM",@progbits,8
        .align 8
.LC2:   .long   269488144
        .long   0
        .align 8
.LC3:   .long   -1
        .long   0
        .text
        .p2align 4,,15
.globl main
        .type   main, @function
main:   pushl   %ebp
        movl    %esp, %ebp
        subl    $56, %esp
        leal    -4(%ebp), %eax
        andl    $-16, %esp
        subl    $16, %esp
        cmpl    %ebp, %eax
        jae     .L9
        movl    $0, -24(%ebp)
        movl    $0, -20(%ebp)
        movq    -24(%ebp), %mm2
        movq    .LC2, %mm0
        movq    .LC3, %mm1
        punpcklbw       %mm2, %mm0
        punpcklbw       %mm2, %mm1
        paddw   %mm1, %mm0
        packuswb        %mm2, %mm0
        movd    %mm0, -28(%ebp)
        emms
        cmpl    $-1, -28(%ebp)
        jne     .L10
        leave
        xorl    %eax, %eax
        ret
.L9:    emms
        leave
        xorl    %eax, %eax
        ret
.L10:   movl    $__PRETTY_FUNCTION__.2544, 12(%esp)
        movl    $30, 8(%esp)
        movl    $.LC0, 4(%esp)
        movl    $.LC1, (%esp)
        call    __assert_fail
        .size   main, .-main
        .section        .rodata
        .type   __PRETTY_FUNCTION__.2544, @object
        .size   __PRETTY_FUNCTION__.2544, 5
__PRETTY_FUNCTION__.2544:
        .string "main"
        .ident  "GCC: (GNU) 4.1.0 20051019 (experimental)"
        .section        .note.GNU-stack,"",@progbits

[builder2@estel BUILD]$ gcc -Wall -O2 pr22432.c -save-temps -march=x86-64
[builder2@estel BUILD]$ ./a.out ; echo $?
0


-- 

pluto at agmk dot net changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |pluto at agmk dot net


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22432

[Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64

[mmitchel at gcc dot gnu dot org]

------- Comment #5 from mmitchel at gcc dot gnu dot org  2005-10-31 04:04 -------
This is a showstopper; wrong code on a primary platform.


-- 

mmitchel at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P2                          |P1


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22432

[Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64

[steven at gcc dot gnu dot org]

------- Comment #6 from steven at gcc dot gnu dot org  2005-11-04 23:17 -------
In the .life1 dump we have:

(insn 41 38 42 2 (set (reg:V2SI 79 [ D.2609 ])
        (subreg:V2SI (reg:V8QI 76) 0)) 998 {*movv2si_internal_rex64 
    (insn_list:REG_DEP_TRUE 32 (nil))
        (expr_list:REG_DEAD (reg:V8QI 76)
            (nil)))

(insn 42 41 43 2 (set (reg:V2SI 80 [ D.2619 ])
        (subreg:V2SI (reg:V8QI 78) 0)) 998 {*movv2si_internal_rex64} 
    (insn_list:REG_DEP_TRUE 38 (nil))
        (expr_list:REG_DEAD (reg:V8QI 78)
            (nil)))

(insn 43 42 46 2 (set (reg:V4HI 81)
        (plus:V4HI (subreg:V4HI (reg:V2SI 79 [ D.2609 ]) 0)
            (subreg:V4HI (reg:V2SI 80 [ D.2619 ]) 0))) 1031 {mmx_addv4hi3} 
    (insn_list:REG_DEP_TRUE 41 (insn_list:REG_DEP_TRUE 42 (nil)))
        (expr_list:REG_DEAD (reg:V2SI 79 [ D.2609 ])
            (expr_list:REG_DEAD (reg:V2SI 80 [ D.2619 ])
                (nil))))



After combine we have:
(note 41 38 42 2 NOTE_INSN_DELETED)

(note 42 41 43 2 NOTE_INSN_DELETED)

(insn 43 42 46 2 (set (reg:V8QI 81)
        (plus:V8QI (reg:V8QI 76)
            (reg:V8QI 78))) 1030 {mmx_addv8qi3}
    (insn_list:REG_DEP_TRUE 38 (insn_list:REG_DEP_TRUE 32 (nil)))
        (expr_list:REG_DEAD (reg:V8QI 78)
            (expr_list:REG_DEAD (reg:V8QI 76)
                (nil))))

Is that really the same???


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22432

[Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64

[steven at gcc dot gnu dot org]

------- Comment #7 from steven at gcc dot gnu dot org  2005-11-04 23:26 -------
According to rth on IRC this is indeed absolutely wrong.

So it looks like we may have a combine bug here.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22432

[Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64

[ian at airs dot com]

------- Comment #8 from ian at airs dot com  2005-11-04 23:27 -------
No, doing the add in v4hi mode is not the same as doing the add in v8qi mode. 
The carry bits will be handled differently.

It's also rather odd that register 81 changed from V4HImode to V8QImode. 
Normally a pseudo-register always has the same mode, and accessing it in a
different mode requires a subreg.


-- 

ian at airs dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |ian at airs dot com


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22432

[Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64

[ian at airs dot com]

------- Comment #9 from ian at airs dot com  2005-11-05 01:00 -------
Created an attachment (id=10151)
 --> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=10151&action=view)
Proposed patch

This patch fixes the problem.  I'm running tests now.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22432

[Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64

[ian at gcc dot gnu dot org]

------- Comment #10 from ian at gcc dot gnu dot org  2005-11-06 05:34 -------
Subject: Bug 22432

Author: ian
Date: Sun Nov  6 05:34:38 2005
New Revision: 106555

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=106555
Log:
./:
        PR target/22432
        * combine.c (apply_distributive_law): Don't distribute across a
        vector mode subreg.
testsuite/:
        PR target/22432
        * gcc.target/i386/pr22432.c: New test.

Added:
    trunk/gcc/testsuite/gcc.target/i386/pr22432.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/combine.c
    trunk/gcc/testsuite/ChangeLog


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22432

[Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64

[ian at gcc dot gnu dot org]

------- Comment #11 from ian at gcc dot gnu dot org  2005-11-06 06:38 -------
Subject: Bug 22432

Author: ian
Date: Sun Nov  6 06:38:14 2005
New Revision: 106556

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=106556
Log:
./:
        PR target/22432
        * combine.c (apply_distributive_law): Don't distribute across a
        vector mode subreg.
testsuite/:
2005-11-05  Ian Lance Taylor  <ian@airs.com>

        PR target/22432
        * gcc.target/i386/pr22432.c: New test.

Added:
    branches/gcc-4_0-branch/gcc/testsuite/gcc.target/i386/pr22432.c
Modified:
    branches/gcc-4_0-branch/gcc/ChangeLog
    branches/gcc-4_0-branch/gcc/combine.c
    branches/gcc-4_0-branch/gcc/testsuite/ChangeLog


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22432

[Bug target/22432] [4.0/4.1 Regression] Wrong code generation using MMX intrinsics on amd64

[ian at airs dot com]

------- Comment #12 from ian at airs dot com  2005-11-06 06:41 -------
Fixed for 4.0.3 and 4.1.


-- 

ian at airs dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|                            |FIXED


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=22432