[Bug target/24953] New: RTL check: access of elt 1 of vector with last elt 0 in vrsave_operation_1, at config/rs6000/predicates.md:1041

[Bug target/24953] New: RTL check: access of elt 1 of vector with last elt 0 in vrsave_operation_1, at config/rs6000/predicates.md:1041

[aj at gcc dot gnu dot org]

Running the GCC testsuite I see the following ICE:

Executing on host: /abuild/aj/gcc/gcc/xgcc -B/abuild/aj/gcc/gcc/
/aj-cvs/gcc-svn/branches/gcc-4_1-branch/gcc/testsuite/gcc.dg/vmx/gcc-bug-b.c  
-O1  -m
altivec -mabi=altivec -std=gnu99 -fno-show-column -S  -m64 -o gcc-bug-b.s   
(timeout = 300)
/aj-cvs/gcc-svn/branches/gcc-4_1-branch/gcc/testsuite/gcc.dg/vmx/gcc-bug-b.c:
In function 'test':
/aj-cvs/gcc-svn/branches/gcc-4_1-branch/gcc/testsuite/gcc.dg/vmx/gcc-bug-b.c:23:
internal compiler error: RTL check: access of elt 1 of vector with las
t elt 0 in vrsave_operation_1, at config/rs6000/predicates.md:1041
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://gcc.gnu.org/bugs.html> for instructions.
compiler exited with status 1
output is:
/aj-cvs/gcc-svn/branches/gcc-4_1-branch/gcc/testsuite/gcc.dg/vmx/gcc-bug-b.c:
In function 'test':
/aj-cvs/gcc-svn/branches/gcc-4_1-branch/gcc/testsuite/gcc.dg/vmx/gcc-bug-b.c:23:
internal compiler error: RTL check: access of elt 1 of vector with las
t elt 0 in vrsave_operation_1, at config/rs6000/predicates.md:1041
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://gcc.gnu.org/bugs.html> for instructions.

FAIL: gcc.dg/vmx/gcc-bug-b.c  -O1  (test for excess errors)

Compiler is:
/opt/gcc/4.1-devel/bin/gcc -v
Using built-in specs.
Target: powerpc64-suse-linux-gnu
Configured with: /aj-cvs/gcc-svn/branches/gcc-4_1-branch/configure
--prefix=/opt/gcc/4.1-devel --enable-checking=misc,tree,gc,rtl,rtlflag,assert
--enable-threads=posix --enable-clocale=gnu --enable-__cxa_atexit
--enable-shared --enable-languages=c,c++,treelang,java,f95,objc
--with-system-zlib --with-cpu=default32 powerpc64-suse-linux-gnu
Thread model: posix
gcc version 4.1.0 20051119 (prerelease)


-- 
           Summary: RTL check: access of elt 1 of vector with last elt 0 in
                    vrsave_operation_1, at config/rs6000/predicates.md:1041
           Product: gcc
           Version: 4.1.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: aj at gcc dot gnu dot org
 GCC build triplet: powerpc64-linux-gnu
  GCC host triplet: powerpc64-linux-gnu
GCC target triplet: powerpc64-linux-gnu


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24953

[Bug target/24953] RTL check: access of elt 1 of vector with last elt 0 in vrsave_operation_1, at config/rs6000/predicates.md:1041

[dje at gcc dot gnu dot org]

------- Comment #1 from dje at gcc dot gnu dot org  2005-11-21 02:09 -------
We just need to check that we have enough elts in the VEC.


-- 

dje at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         AssignedTo|unassigned at gcc dot gnu   |dje at gcc dot gnu dot org
                   |dot org                     |
             Status|UNCONFIRMED                 |ASSIGNED
     Ever Confirmed|0                           |1
   Last reconfirmed|0000-00-00 00:00:00         |2005-11-21 02:09:57
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24953

[Bug target/24953] RTL check: access of elt 1 of vector with last elt 0 in vrsave_operation_1, at config/rs6000/predicates.md:1041

[dje at gcc dot gnu dot org]

------- Comment #2 from dje at gcc dot gnu dot org  2005-11-21 02:54 -------
Index: predicates.md
===================================================================
I think the following patch fixes the checking failure.  I will bootstrap
overnight.

--- predicates.md       (revision 107244)
+++ predicates.md       (working copy)
@@ -1034,7 +1034,8 @@
   if (count <= 1
       || GET_CODE (XVECEXP (op, 0, 0)) != SET
       || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
-      || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != UNSPEC_VOLATILE)
+      || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != UNSPEC_VOLATILE
+      || XVECLEN (SET_SRC (XVECEXP (op, 0, 0)), 0) <= 1)
     return 0;


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24953

[Bug target/24953] RTL check: access of elt 1 of vector with last elt 0 in vrsave_operation_1, at config/rs6000/predicates.md:1041

[dje at gcc dot gnu dot org]

------- Comment #3 from dje at gcc dot gnu dot org  2005-11-21 16:12 -------
Subject: Bug 24953

Author: dje
Date: Mon Nov 21 16:12:32 2005
New Revision: 107311

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=107311
Log:
        PR target/24953
        * config/rs6000/predicates.md (vrsave_operation): Check
        UNSPEC_VOLATILE value.

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/predicates.md


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24953

[Bug target/24953] RTL check: access of elt 1 of vector with last elt 0 in vrsave_operation_1, at config/rs6000/predicates.md:1041

[dje at gcc dot gnu dot org]

------- Comment #4 from dje at gcc dot gnu dot org  2005-11-21 18:04 -------
Subject: Bug 24953

Author: dje
Date: Mon Nov 21 18:04:14 2005
New Revision: 107314

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=107314
Log:
        PR target/24953
        * config/rs6000/predicates.md (vrsave_operation): Check
        UNSPEC_VOLATILE value.

Modified:
    branches/gcc-4_1-branch/gcc/ChangeLog
    branches/gcc-4_1-branch/gcc/config/rs6000/predicates.md


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24953

[Bug target/24953] [4.1/4.2 Regression] RTL check: access of elt 1 of vector with last elt 0 in vrsave_operation_1, at config/rs6000/predicates.md:1041

[dje at gcc dot gnu dot org]

------- Comment #5 from dje at gcc dot gnu dot org  2005-11-21 18:52 -------
Fixed.


-- 

dje at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|                            |FIXED
            Summary|RTL check: access of elt 1  |[4.1/4.2 Regression] RTL
                   |of vector with last elt 0 in|check: access of elt 1 of
                   |vrsave_operation_1, at      |vector with last elt 0 in
                   |config/rs6000/predicates.md:|vrsave_operation_1, at
                   |1041                        |config/rs6000/predicates.md:
                   |                            |1041


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24953

[Bug target/24953] [4.1/4.2 Regression] RTL check: access of elt 1 of vector with last elt 0 in vrsave_operation_1, at config/rs6000/predicates.md:1041

[pinskia at gcc dot gnu dot org]

-- 

pinskia at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |4.1.0


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24953