[Bug rtl-optimization/15792] missed subreg optimization

["ian at airs dot com" <gcc-bugzilla@gcc.gnu.org>]

------- Comment #8 from ian at airs dot com  2006-02-07 00:30 -------
Yes, I still get an unnecessary move in your test case which uses addition.

One reason this happens is because the addition can not be split until after
the reload pass is complete.  That is because the add relies on the condition
code registers, but reload can clobber the condition code registers between any
arbitrary pair of instructions.

Another reason this happens is that the compiler knows how to set the condition
flags using a bitwise or, but it does so using a scratch register to hold the
destination of the bitwise or.  The register allocator is not clever enough to
see that if it has a DImode pair of registers which dies in the insn, that it
can use the second register in the DImode pair as the scratch register.  If the
register allocator saw that, then it could use that register as the scratch
register and avoid allocating a new scratch register and copying the value into
it.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=15792