[Bug target/25603] [4.1/4.2 Regression]: Miscompiled FORTRAN program

["wilson at gcc dot gnu dot org" <gcc-bugzilla@gcc.gnu.org>]

------- Comment #9 from wilson at gcc dot gnu dot org  2006-02-10 02:03 -------
I've looked at the reload-branch also.  I need two patches in order to
bootstrap it.  One trivial obvious patch, and one hacked not technically
correct patch.  It then bootstrapped and compiled this testcase correctly.

Since a major goal of the reload-branch is a complete rewrite of how
inheritance works, it isn't clear that the problem is fixed just because it
happened to work.  So I took a look at the sources.  The key detail here is
that reload-branch uses the scan_rtx function to determine what registers are
inputs and/or outputs of an instruction.  The scan_rtx function does handle
{POST,PRE}_{INC,DEC} correctly, treating them the same as SET, so that the
operand gets marked as an output register.  Although, looking at this, I can't
help but notice that {POST,PRE}_MODIFY do not get equivalent treatment.  I
think this is a bug.  Anyways, I'm convinced that reload-branch has a proper
solution to this bug, and I've got 3 bug reports against reload-branch that I
have to do something with now.

I remain convinced that my earlier suggestion for how to fix current reload is
correct.  I just haven't gotten around to trying to write a patch yet.  In
choose_reload_regs, where it calls regno_clobbered_p, we need an additional
check for registers modified by side-effects, as regno_clobbered_p does not
handle that itself.  This could probably be as simple as checking for a REG_INC
note that mentions the equiv register.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=25603