From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5191 invoked by alias); 4 May 2006 17:30:30 -0000 Received: (qmail 4836 invoked by uid 48); 4 May 2006 17:30:16 -0000 Date: Thu, 04 May 2006 17:30:00 -0000 Message-ID: <20060504173016.4835.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug target/27432] -fschedule-insns -O2 -march=athlon cause compilation error In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "pinskia at gcc dot gnu dot org" Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2006-05/txt/msg00411.txt.bz2 List-Id: ------- Comment #3 from pinskia at gcc dot gnu dot org 2006-05-04 17:30 ------- This is the standard x86 vs 1st pass scheduling vs the register allocator bug. -- pinskia at gcc dot gnu dot org changed: What |Removed |Added ---------------------------------------------------------------------------- Component|c |target Keywords| |ice-on-valid-code, ra http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27432