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From: "rth at gcc dot gnu dot org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/31361] SSE2 generation bug with shifts
Date: Tue, 27 Mar 2007 00:37:00 -0000 [thread overview]
Message-ID: <20070327003703.25028.qmail@sourceware.org> (raw)
In-Reply-To: <bug-31361-11263@http.gcc.gnu.org/bugzilla/>
------- Comment #5 from rth at gcc dot gnu dot org 2007-03-27 01:37 -------
You can shift the 32-bit portions individually. But your test case will now
result in 0,0,0,0 for all optimization levels, since the shift count is taken
from the entire xmm register. In this case, since there is an 8 in each of
the 4 32-bit portions, the shift count is extremely large.
Fixed.
--
rth at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|ASSIGNED |RESOLVED
Resolution| |FIXED
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361
next prev parent reply other threads:[~2007-03-27 0:37 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-03-26 8:53 [Bug c/31361] New: " prakash at punnoor dot de
2007-03-26 8:54 ` [Bug c/31361] " prakash at punnoor dot de
2007-03-26 9:53 ` prakash at punnoor dot de
2007-03-26 18:14 ` [Bug target/31361] " rth at gcc dot gnu dot org
2007-03-27 0:30 ` rth at gcc dot gnu dot org
2007-03-27 0:37 ` rth at gcc dot gnu dot org [this message]
2007-03-27 7:35 ` prakash at punnoor dot de
2007-04-04 22:12 ` rth at gcc dot gnu dot org
2007-04-04 22:13 ` rth at gcc dot gnu dot org
2007-04-15 5:28 ` pinskia at gcc dot gnu dot org
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