[Bug target/29793] New: TESTW{W,L,Q} rCX + JZ/JE should be replaced by J{,E,R}CXZ when possible

[Bug target/29793] New: TESTW{W,L,Q} rCX + JZ/JE should be replaced by J{,E,R}CXZ when possible

[nmiell at comcast dot net]

The Test instruction applied to the rCX register followed by a Jump if Zero
with an 8-bit displacement can be replaced by a single JCXZ/JECXZ/JRCXZ
instruction with no loss of performance (1 cycle + 1 cycle verses 2 cycles on
K8 processors) and a one or two byte decrease in I-cache use per instance.

Replacing TEST rCX/JZ sequences with the JrCXZ insn would be a good first step;
preferentially using the rCX register in order to maximize JrCXZ replacements
would be better.


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           Summary: TESTW{W,L,Q} rCX + JZ/JE should be replaced by
                    J{,E,R}CXZ when possible
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: target
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: nmiell at comcast dot net
GCC target triplet: i?86-*-*, x86_64-*-*


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29793

[Bug target/29793] TESTW{W,L,Q} rCX + JZ/JE should be replaced by J{,E,R}CXZ when possible

[nmiell at comcast dot net]

------- Comment #1 from nmiell at comcast dot net  2006-11-10 06:59 -------
Created an attachment (id=12585)
 --> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=12585&action=view)
little C demonstration

This is a test function in C that demonstrate a case where gcc could be using
JrCXZ and isn't.

Ignore the warnings about a call-clobbered register being used as a global,
that was done in order to force the register allocator into using the rCX
register so that the missed optimization can be demonstrated.

gcc generates:

        subq    $8, %rsp
        testq   %rcx, %rcx
        je      .L4
        call    abort
.L4:    addq    $8, %rsp
        ret

when it could be generating:

        subq    $8, %rsp
        jrcxz   .L4
        call    abort
.L4:    addq    $8, %rsp
        ret


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29793

[Bug target/29793] TESTW{W,L,Q} rCX + JZ/JE should be replaced by J{,E,R}CXZ when possible

[ubizjak at gmail dot com]

------- Comment #2 from ubizjak at gmail dot com  2006-11-10 10:54 -------
(In reply to comment #0)
> The Test instruction applied to the rCX register followed by a Jump if Zero
> with an 8-bit displacement can be replaced by a single JCXZ/JECXZ/JRCXZ

The problem is in "with an 8-bit displacement". This displacement is calculated
during assembler stage, and there is no way to _reliably_ calculate
displacement using gcc's "(pc)" RTX.

To implement this optimization, some support from assembler is needed. When
displacement overflows 8bit, assembler should substitute "jecxz" with
equivalent "test/jmp rel{16,32}" sequence.

This 8-bit displacement problem is in fact the same problem as with "loop"
insn.

However, it would be nice to have "jexcz" and "loop" insns, as they all have
zero latency (as jcc insn have) on p4.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29793

[Bug target/29793] TESTW{W,L,Q} rCX + JZ/JE should be replaced by J{,E,R}CXZ when possible

[ubizjak at gmail dot com]

------- Comment #3 from ubizjak at gmail dot com  2006-11-10 11:18 -------
Following asm illustrates the problem:

        .file   "jcx.c"
        .text
        .p2align 4,,15
.globl blah
        .type   blah, @function
blah:
        pushl   %ebp
        movl    %esp, %ebp
        subl    $8, %esp
        jecxz   .L4
.space  128
        call    abort
.L4:
        leave
        ret
        .size   blah, .-blah
        .ident  "GCC: (GNU) 4.3.0 20061110 (experimental)"
        .section        .note.GNU-stack,"",@progbits

You can try to assemble this...


-- 

ubizjak at gmail dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |ubizjak at gmail dot com


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29793

[Bug target/29793] TESTW{W,L,Q} rCX + JZ/JE should be replaced by J{,E,R}CXZ when possible

[ubizjak at gmail dot com]

------- Comment #4 from ubizjak at gmail dot com  2007-04-05 12:29 -------
(In reply to comment #2)

> To implement this optimization, some support from assembler is needed. When
> displacement overflows 8bit, assembler should substitute "jecxz" with
> equivalent "test/jmp rel{16,32}" sequence.

Unfortunatelly, test/jmp clobbers flags, and jecxz doesn't. Due to this, and
example in comment #3, we can't reliably generate proposed instructions.


-- 

ubizjak at gmail dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|                            |WONTFIX


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29793

[Bug target/29793] TESTW{W,L,Q} rCX + JZ/JE should be replaced by J{,E,R}CXZ when possible

[steven at gcc dot gnu dot org]

------- Comment #5 from steven at gcc dot gnu dot org  2007-04-05 12:54 -------
Can we compute the displacement reliable enough to say that it is smaller than
some other number (e.g. 64)?


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29793

[Bug target/29793] TESTW{W,L,Q} rCX + JZ/JE should be replaced by J{,E,R}CXZ when possible

[ubizjak at gmail dot com]

------- Comment #6 from ubizjak at gmail dot com  2007-04-05 16:27 -------
(In reply to comment #5)
> Can we compute the displacement reliable enough to say that it is smaller than
> some other number (e.g. 64)?

Good idea!

The (untested) patch that handles SImode compares is at
http://gcc.gnu.org/ml/gcc-patches/2007-04/msg00178.html. Have fun ;)


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29793