From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 26148 invoked by alias); 26 Jul 2007 10:46:58 -0000 Received: (qmail 26081 invoked by uid 48); 26 Jul 2007 10:46:49 -0000 Date: Thu, 26 Jul 2007 10:46:00 -0000 Message-ID: <20070726104649.26080.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug tree-optimization/32826] Reduction into a global variable causes a Load Hit Store Hazard (for the Cell) In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "tehila at il dot ibm dot com" Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2007-07/txt/msg02677.txt.bz2 ------- Comment #2 from tehila at il dot ibm dot com 2007-07-26 10:46 ------- (In reply to comment #2) Just want a clarification: I see you're compiling on PPU (since you're using -maltivec). Does this problematic also on SPU? Does SPU has this LHS hazard? Another question: lwz r0,-20(r1) <---- LHS hazard stw r0,lo16(_e)(r2) The problem here is these 2 insns, right? The store that is right after (or too close to) the load ? -- tehila at il dot ibm dot com changed: What |Removed |Added ---------------------------------------------------------------------------- CC| |tehila at il dot ibm dot com http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32826