From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 816 invoked by alias); 6 Oct 2007 04:12:10 -0000 Received: (qmail 735 invoked by alias); 6 Oct 2007 04:11:57 -0000 Date: Sat, 06 Oct 2007 04:12:00 -0000 Message-ID: <20071006041157.734.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug rtl-optimization/33669] [4.3 Regression] Revision 128957 miscompiles 481.wrf In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "zadeck at naturalbridge dot com" Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2007-10/txt/msg00498.txt.bz2 ------- Comment #7 from zadeck at naturalbridge dot com 2007-10-06 04:11 ------- Subject: Re: [4.3 Regression] Revision 128957 miscompiles 481.wrf hjl at lucon dot org wrote: > ------- Comment #5 from hjl at lucon dot org 2007-10-06 02:07 ------- > Kenny, does your patch > > http://gcc.gnu.org/ml/gcc-patches/2007-10/msg00124.html > > handle cases where number of consecutive hard regs needed to hold some mode > 1 > correctly? IA32 needs 2 hard registers to hold long long and your patch > miscompiles the testcase in comment #4. > > > I will look into it. It should do this correctly. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33669