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From: "danglin at gcc dot gnu dot org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug middle-end/32889] [4.2 Regression] ICE in delete_output_reload, at reload1.c:7926
Date: Sun, 11 Nov 2007 16:50:00 -0000	[thread overview]
Message-ID: <20071111164954.10822.qmail@sourceware.org> (raw)
In-Reply-To: <bug-32889-10464@http.gcc.gnu.org/bugzilla/>



------- Comment #10 from danglin at gcc dot gnu dot org  2007-11-11 16:49 -------
This is a regression in reload.

(gdb) p debug_rtx (insn)
(insn 73 78 76 5 (set (mem/c:SI (plus:SI (reg/f:SI 3 %r3)
                (const_int 17888 [0x45e0])) [19 S4 A32])
        (plus:SI (reg/f:SI 3 %r3)
            (const_int 1056 [0x420]))) 114 {addsi3} (nil)
    (expr_list:REG_EQUIV (plus:SI (reg/f:SI 3 %r3)
            (const_int 1056 [0x420]))
        (nil)))

The problem is in the handling of the destination of insn 73.  The
constraints for the addsi3 pattern only accept register operands.
The pseudo in the lreg pass has been replaced by a temp which must
be reloaded.

I looked at pa_secondary_reload.  It simply returns NO_REGS for
(mem/c:SI (plus:SI (reg/f:SI 3 %r3) (const_int 17888 [0x45e0]))).
The frame offset in the temp exceeds that which can be handled
in a simple move.  So, an intermediate registers is needed.


-- 

danglin at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|target                      |middle-end


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32889


  parent reply	other threads:[~2007-11-11 16:50 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-07-25  8:19 [Bug c/32889] New: " b dot gunreben at web dot de
2007-07-25  8:20 ` [Bug c/32889] " b dot gunreben at web dot de
2007-07-25  8:26 ` b dot gunreben at web dot de
2007-10-09  7:27 ` [Bug target/32889] " debian-gcc at lists dot debian dot org
2007-10-19 21:30 ` tbm at cyrius dot com
2007-10-19 21:31 ` [Bug target/32889] [4.2 Regression] " tbm at gcc dot gnu dot org
2007-10-19 21:33 ` tbm at cyrius dot com
2007-10-19 21:37 ` tbm at cyrius dot com
2007-10-19 22:16 ` dave at hiauly1 dot hia dot nrc dot ca
2007-10-20  6:10 ` tbm at cyrius dot com
2007-10-22  8:45 ` pinskia at gcc dot gnu dot org
2007-11-11 16:50 ` danglin at gcc dot gnu dot org [this message]
2007-11-11 23:28 ` [Bug middle-end/32889] " danglin at gcc dot gnu dot org
2007-11-24 21:58 ` dave at hiauly1 dot hia dot nrc dot ca
2007-12-09 18:02 ` danglin at gcc dot gnu dot org
2007-12-10  3:17 ` danglin at gcc dot gnu dot org
2007-12-10  3:27 ` [Bug target/32889] " danglin at gcc dot gnu dot org
2008-02-23 21:19 ` eager at eagercon dot com
2008-02-23 21:22 ` eager at eagercon dot com
2008-02-24  1:41 ` dave at hiauly1 dot hia dot nrc dot ca

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