[Bug middle-end/33887] [4.2/4.3 Regression] Reference to bitfield gets wrong value when optimizing

["rguenth at gcc dot gnu dot org" <gcc-bugzilla@gcc.gnu.org>]

------- Comment #7 from rguenth at gcc dot gnu dot org  2007-12-11 12:50 -------
Reduced testcase:

extern "C" void abort() __attribute__ ((noreturn));

struct s
{
  unsigned long long f1 : 40;
  unsigned int f2 : 24;
} sv;

int main()
{
  int f2;
  sv.f2 = (1 << 24) - 1;
  __asm__ volatile ("" : : : "memory");
  ++sv.f2;
  f2 = sv.f2;
  if (f2 != 0)
    abort();
  return 0;
}

it doesn't fail with the C frontend though, even though the IL before
expansion is the same:

  <unnamed-unsigned:24> D.1548;

<bb 2>:
  sv.f2 = 16777215;
  __asm__ __volatile__("":::"memory");
  D.1548 = sv.f2 + 1;
  sv.f2 = D.1548;
  if (D.1548 != 0)

the difference is:

 (insn 13 10 14 3 t5.i:14 (set (reg/f:DI 67)
-        (const:DI (plus:DI (symbol_ref:DI ("sv") <var_decl 0x2b6b88bba320 sv>)
+        (const:DI (plus:DI (symbol_ref:DI ("sv") [flags 0x2] <var_decl
0x2b2e527ee0a0 sv>)
                 (const_int 4 [0x4])))) -1 (nil))

 (insn 14 13 15 3 t5.i:14 (set (reg:SI 69)
@@ -197,59 +185,52 @@
             (const_int 8 [0x8]))
         (nil)))

-(insn 16 15 17 3 t5.i:14 (parallel [
-            (set (reg:SI 58 [ D.1548 ])
+(insn 16 15 18 3 t5.i:14 (parallel [
+            (set (reg:SI 58 [ D.2025 ])
                 (plus:SI (reg:SI 68)
                     (const_int 1 [0x1])))
             (clobber (reg:CC 17 flags))
         ]) -1 (nil))

-(insn 17 16 19 3 t5.i:14 (parallel [
-            (set (reg:SI 58 [ D.1548 ])
-                (and:SI (reg:SI 58 [ D.1548 ])
-                    (const_int 16777215 [0xffffff])))
-            (clobber (reg:CC 17 flags))
-        ]) -1 (nil))
-
-(insn 19 17 20 3 t5.i:14 (set (reg/f:DI 71)
-        (const:DI (plus:DI (symbol_ref:DI ("sv") <var_decl 0x2b6b88bba320 sv>)
+(insn 18 16 19 3 t5.i:14 (set (reg/f:DI 71)
+        (const:DI (plus:DI (symbol_ref:DI ("sv") [flags 0x2] <var_decl
0x2b2e527ee0a0 sv>)
                 (const_int 4 [0x4])))) -1 (nil))

-(insn 20 19 21 3 t5.i:14 (parallel [
+(insn 19 18 20 3 t5.i:14 (parallel [
             (set (reg:SI 72)
-                (ashift:SI (reg:SI 58 [ D.1548 ])
+                (ashift:SI (reg:SI 58 [ D.2025 ])
                     (const_int 8 [0x8])))
             (clobber (reg:CC 17 flags))
         ]) -1 (nil))

...


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33887