[Bug middle-end/35363] Missing bit field coalscing optimization

["rguenth at gcc dot gnu dot org" <gcc-bugzilla@gcc.gnu.org>]

------- Comment #1 from rguenth at gcc dot gnu dot org  2008-02-25 11:36 -------
(please make our work easier and make the initial reports Severity enhancement
and add missed-optimization as a Keyword and make the report against a
gcc version, preferably 4.3.0 or 4.4.0;  testcases ready for inclusion into
the gcc testsuite would be nice as well, as well as checking for duplicate
reports yourself).

This testcase actually requires one load, one and (mask out bits in the
affected bitfield parts), one or and one store.  The MEM_REF work
might lay grounds for this to work, it makes the read-modify-write
cycles explicit on the tree level and thus allows the loads and
stores to be CSEd.


-- 

rguenth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |rguenth at gcc dot gnu dot
                   |                            |org
           Severity|normal                      |enhancement
             Status|UNCONFIRMED                 |NEW
     Ever Confirmed|0                           |1
           Keywords|                            |missed-optimization
   Last reconfirmed|0000-00-00 00:00:00         |2008-02-25 11:36:39
               date|                            |
            Version|unknown                     |4.3.0


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35363