[Bug rtl-optimization/35232] New: [4.3 regression] ICE in fp-int-convert-double.c at -O2

[Bug rtl-optimization/35232] New: [4.3 regression] ICE in fp-int-convert-double.c at -O2

[rsandifo at gcc dot gnu dot org]

fp-int-convert-double.c ICEs on mipsisa64-elf when compiled
with "-O2 -mabi=o64 -mips16".  This is a recent failure;
it appears to be a latent bug exposed by:

2008-02-06  Uros Bizjak  <ubizjak@gmail.com>

        PR target/35083
        * optabs.c (expand_float): Do not check for decimal modes when
        expanding unsigned integer through signed conversion.

At first glance, it appears to be a reload inheritance bug.
I'll have a look later today.


-- 
           Summary: [4.3 regression] ICE in fp-int-convert-double.c at -O2
           Product: gcc
           Version: 4.3.0
            Status: UNCONFIRMED
          Keywords: ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: rtl-optimization
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: rsandifo at gcc dot gnu dot org
GCC target triplet: mipsisa64-elf


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3 regression] ICE in fp-int-convert-double.c at -O2

[rsandifo at gcc dot gnu dot org]

-- 

rsandifo at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         AssignedTo|unassigned at gcc dot gnu   |rsandifo at gcc dot gnu dot
                   |dot org                     |org
             Status|UNCONFIRMED                 |ASSIGNED
     Ever Confirmed|0                           |1
   Last reconfirmed|0000-00-00 00:00:00         |2008-02-17 12:43:06
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3 regression] ICE in fp-int-convert-double.c at -O2

[rguenth at gcc dot gnu dot org]

-- 

rguenth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |uros at gcc dot gnu dot org
           Priority|P3                          |P1
   Target Milestone|---                         |4.3.0


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3 regression] ICE in fp-int-convert-double.c at -O2

[ubizjak at gmail dot com]

------- Comment #1 from ubizjak at gmail dot com  2008-02-17 21:33 -------
IMO is a bit suspicious that FP<->int conversions in mips.md operate on both FP
operands, i.e:

(define_insn "fix_truncdfsi2_insn"
  [(set (match_operand:SI 0 "register_operand" "=f")
        (fix:SI (match_operand:DF 1 "register_operand" "f")))]

...and similar patterns... , as well as:

(define_insn "floatsidf2"
  [(set (match_operand:DF 0 "register_operand" "=f")
        (float:DF (match_operand:SI 1 "register_operand" "f")))]

...and similar patterns.

One would expect a constraint that describes integer regs for output operand in
the former case and integer regs for input operand in the later case.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3 regression] ICE in fp-int-convert-double.c at -O2

[rsandifo at nildram dot co dot uk]

------- Comment #2 from rsandifo at nildram dot co dot uk  2008-02-17 22:13 -------
Subject: Re:  [4.3 regression] ICE in fp-int-convert-double.c at -O2

"ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org> writes:
> IMO is a bit suspicious that FP<->int conversions in mips.md operate on both FP
> operands, i.e:
>
> (define_insn "fix_truncdfsi2_insn"
>   [(set (match_operand:SI 0 "register_operand" "=f")
>         (fix:SI (match_operand:DF 1 "register_operand" "f")))]
>
> ...and similar patterns... , as well as:
>
> (define_insn "floatsidf2"
>   [(set (match_operand:DF 0 "register_operand" "=f")
>         (float:DF (match_operand:SI 1 "register_operand" "f")))]
>
> ...and similar patterns.
>
> One would expect a constraint that describes integer regs for output
> operand in the former case and integer regs for input operand in the
> later case.

I don't see why.  The MIPS insns in question operate on FP regs only.
"f" just denotes a class of register: it doesn't indicate an FP mode.

Anyway, it was indeed a reload inheritance bug.  We have an insn:

(insn 1749 1748 1750 193
../../../gcc/gcc/testsuite/gcc.dg/torture/fp-int-conver
t-double.c:12 (set (reg:SI 1475 [ ivout.331+-3 ])
        (zero_extend:SI (reg:QI 2209 [ ivout ]))) 147
{*zero_extendqisi2_mips16e
} (expr_list:REG_DEAD (reg:QI 2209 [ ivout ])
        (nil)))

and MIPS16 zero extensions require the input operand to match the output.
The insn gets the following reload:

Reloads for insn # 1749
Reload 0: reload_in (QI) = (reg:QI 2 $2 [orig:2209 ivout ] [2209])
        reload_out (SI) = (reg:SI 1475 [ ivout.331+-3 ])
        M16_REGS, RELOAD_OTHER (opnum = 0)
        reload_in_reg: (reg:QI 2 $2 [orig:2209 ivout ] [2209])
        reload_out_reg: (reg:SI 1475 [ ivout.331+-3 ])
        reload_reg_rtx: (reg:QI 2 $2 [orig:2209 ivout ] [2209])

Note that the reload_reg_rtx is QImode.  This is valid, because
(reg:QI 2) and (reg:SI 2) occupy the same number of registers
(and the code that chose (reg:QI 2) did check this).  But we
then record inheritance information as though we had a
(reg:SI 1475) <- (reg:QI 2) copy, and get confused later when
we expect the source to have SImode instead of QImode.

You can see the same thing in a wrong-code scenario with this
32-bit MIPS testcase:

--------------------------------------------------------------------
__attribute__((nomips16)) unsigned int
f1 (unsigned long long x)
{
  unsigned int r;
  asm ("# %0" : "=a" (r) : "0" (x));
  asm ("# %0" : "=h" (r) : "0" (r));
  return r;
}

__attribute__((nomips16)) unsigned int
f2 (unsigned long long x)
{
  unsigned int r;
  asm ("# %0" : "=a" (r) : "0" (x));
  asm ("# %0" : "=l" (r) : "0" (r));
  return r;
}

int
main (void)
{
  return f1 (4) != 4 || f2 (4) != 4;
}
--------------------------------------------------------------------

(one function for each endianness).  Here we have an in-out reload
with a 64-bit input (x) and a 32-bit output (r), so the reload register
itself is 64 bits wide.  emit_output_reload_insns correctly adjusts
the reload register for the output mode, but we record inheritance
as though the copy used an unadjusted register.  In other words,
we effectively record a 64-bit-to-32-bit copy instead of a 32-bit copy.
Despite the mode mismatch, we fluke correct output for one endianness,
but we get the wrong half of the register with the other endianness.

I'm testing a patch.

Richard


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3/4.4 regression] ICE in fp-int-convert-double.c at -O2

[rsandifo at gcc dot gnu dot org]

------- Comment #3 from rsandifo at gcc dot gnu dot org  2008-02-20 12:17 -------
Subject: Bug 35232

Author: rsandifo
Date: Wed Feb 20 12:16:51 2008
New Revision: 132473

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=132473
Log:
gcc/testsuite/
        PR rtl-optimization/35232
        * gcc.dg/torture/fp-int-convert-float.c: Skip for MIPS16 targets.
        * gcc.dg/torture/fp-int-convert-double.c: Likewise.
        * gcc.dg/torture/fp-int-convert-long-double.c: Likewise.

Modified:
    branches/gcc-4_3-branch/gcc/testsuite/ChangeLog
   
branches/gcc-4_3-branch/gcc/testsuite/gcc.dg/torture/fp-int-convert-double.c
    branches/gcc-4_3-branch/gcc/testsuite/gcc.dg/torture/fp-int-convert-float.c
   
branches/gcc-4_3-branch/gcc/testsuite/gcc.dg/torture/fp-int-convert-long-double.c


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3/4.4 regression] ICE in fp-int-convert-double.c at -O2

[jakub at gcc dot gnu dot org]

-- 

jakub at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P1                          |P2


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3/4.4 regression] ICE in fp-int-convert-double.c at -O2

[rguenth at gcc dot gnu dot org]

-- 

rguenth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to fail|                            |4.3.0
   Target Milestone|4.3.0                       |4.3.1


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3/4.4 regression] ICE in fp-int-convert-double.c at -O2

[rsandifo at gcc dot gnu dot org]

------- Comment #4 from rsandifo at gcc dot gnu dot org  2008-03-25 20:43 -------
Subject: Bug 35232

Author: rsandifo
Date: Tue Mar 25 20:43:06 2008
New Revision: 133531

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=133531
Log:
gcc/
        PR rtl-optimization/35232
        * reload1.c (reg_reloaded_call_part_clobbered): Clarify comment.
        (forget_old_reloads_1, forget_marked_reloads): Don't clear
        reg_reloaded_call_part_clobbered here.
        (reload_regs_reach_end_p): New function.
        (reload_reg_rtx_for_input): New variable.
        (reload_reg_rtx_for_output): Likewise.
        (emit_input_reload_insns): Use reloadreg rather than rl->reg_rtx
        when reassigning a pseudo register.  Load reloadreg from 
        reload_reg_rtx_for_input, moving the mode and register
        calculation to...
        (do_input_reload): ...here.  Use the mode-adjusted reg_rtx
        instead of the original when deciding whether an input reload
        would be a no-op or whether an output reload can be deleted.
        (emit_output_reload_insns): Use the mode-adjusted reg_rtx
        when setting up new_spill_reg_store.  Load it from
        reload_reg_rtx_for_output, moving the mode and register
        calculation to...
        (do_output_reload): ...here.  Use the mode-adjusted reg_rtx
        instead of the original when deciding whether an output reload
        would be a no-op.  Do the same when modifying insn notes.
        Use rtx_equal_p instead of == to compare the registers.
        (inherit_piecemeal_p): Take a mode and two register numbers
        as argument.
        (emit_reload_insns): Clear new_spill_reg_store for every hard
        register in the reload register.  Remove spill registers
        from reg_reloaded_valid before considering whether to record
        inheritance information for them.  Use reload_reg_rtx_for_output
        instead of reg_rtx when recording output reloads.  Use
        reload_reg_rtx_for_input instead of reg_rtx when recording
        input reloads.  Set or clear reg_reloaded_call_part_clobbered
        at the same time as setting reg_reloaded_valid.
        (delete_output_reload): Add a new_reload_reg parameter and use it
        instead of rld[j].reg_rtx.
        (emit_input_reload_insns, do_input_reload, do_output_reload): Adjust
        calls accordingly.

gcc/testsuite/
        PR rtl-optimization/35232
        * gcc.target/mips/pr35232.c: New test.

Added:
    trunk/gcc/testsuite/gcc.target/mips/pr35232.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/reload1.c
    trunk/gcc/testsuite/ChangeLog


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3 Regression] ICE in fp-int-convert-double.c at -O2

[rsandifo at gcc dot gnu dot org]

------- Comment #5 from rsandifo at gcc dot gnu dot org  2008-03-25 20:47 -------
Fixed on mainline.  Will leave the patch to settle for a bit
before proposing it for 4.3.


-- 

rsandifo at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to work|                            |4.4.0
            Summary|[4.3/4.4 regression] ICE in |[4.3 Regression] ICE in fp-
                   |fp-int-convert-double.c at -|int-convert-double.c at -O2
                   |O2                          |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3 Regression] ICE in fp-int-convert-double.c at -O2

[rguenth at gcc dot gnu dot org]

------- Comment #6 from rguenth at gcc dot gnu dot org  2008-06-06 14:58 -------
4.3.1 is being released, adjusting target milestone.


-- 

rguenth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|4.3.1                       |4.3.2


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3 Regression] ICE in fp-int-convert-double.c at -O2

[jsm28 at gcc dot gnu dot org]

------- Comment #7 from jsm28 at gcc dot gnu dot org  2008-08-27 22:03 -------
4.3.2 is released, changing milestones to 4.3.3.


-- 

jsm28 at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|4.3.2                       |4.3.3


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3 Regression] ICE in fp-int-convert-double.c at -O2

[rguenth at gcc dot gnu dot org]

------- Comment #8 from rguenth at gcc dot gnu dot org  2009-01-24 10:20 -------
GCC 4.3.3 is being released, adjusting target milestone.


-- 

rguenth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|4.3.3                       |4.3.4


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3 Regression] ICE in fp-int-convert-double.c at -O2

[rguenth at gcc dot gnu dot org]

------- Comment #9 from rguenth at gcc dot gnu dot org  2009-08-04 12:28 -------
GCC 4.3.4 is being released, adjusting target milestone.


-- 

rguenth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|4.3.4                       |4.3.5


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232

[Bug rtl-optimization/35232] [4.3 Regression] ICE in fp-int-convert-double.c at -O2

[rguenth at gcc dot gnu dot org]

------- Comment #10 from rguenth at gcc dot gnu dot org  2010-05-22 18:12 -------
GCC 4.3.5 is being released, adjusting target milestone.


-- 

rguenth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|4.3.5                       |4.3.6


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=35232