[Bug middle-end/36444] New: [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[Bug middle-end/36444] New: [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[pinskia at gcc dot gnu dot org]

Testcase:
#define vector __attribute__((vector_size(16) ))
struct struct1  {
  union {}    vmx;
  struct struct2   {
    struct2(const struct2& r) {}
  } w;
} __attribute__((aligned(16)));
struct struct3  {
  vector float vmx;
  operator const struct1& () const{
    return *reinterpret_cast<const struct1*>(this);
  }
};
struct3 func3( struct3 V1);
struct3 func2( void );
void func1( )  {
  struct1 vVec = func2() ;
  func3 ( (struct3&)vVec );
}

--- CUT ---
On PowerPC use -O1 -maltivec, on x86 use -msse2 -O1.  This was exposed by my
using VCE more patch.


-- 
           Summary: [4.4 Regression] ICE in gen_lowpart_general with -O1
                    with vector registers
           Product: gcc
           Version: 4.4.0
            Status: UNCONFIRMED
          Keywords: ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: middle-end
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: pinskia at gcc dot gnu dot org
GCC target triplet: powerpc*-*-*


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444

[Bug middle-end/36444] [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[pinskia at gcc dot gnu dot org]

-- 

pinskia at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |4.4.0


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444

[Bug middle-end/36444] [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[pinskia at gcc dot gnu dot org]

------- Comment #1 from pinskia at gcc dot gnu dot org  2008-06-05 22:56 -------
Fix for at least PowerPC (we should be trying to get the correct sized vector
mode):
Index: expmed.c
===================================================================
--- expmed.c    (revision 2510)
+++ expmed.c    (working copy)
@@ -1129,7 +1129,7 @@ extract_bit_field (rtx str_rtx, unsigned
        new_mode = MIN_MODE_VECTOR_INT;

       for (; new_mode != VOIDmode ; new_mode = GET_MODE_WIDER_MODE (new_mode))
-       if (GET_MODE_NUNITS (new_mode) == nunits
+       if (GET_MODE_SIZE (new_mode) == GET_MODE_SIZE (new_mode)
            && GET_MODE_INNER (new_mode) == tmode
            && targetm.vector_mode_supported_p (new_mode))
          break;


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444

[Bug middle-end/36444] [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[pinskia at gcc dot gnu dot org]

------- Comment #2 from pinskia at gcc dot gnu dot org  2008-06-05 23:13 -------
And the fix for the second issue:
Index: expr.c
===================================================================
--- expr.c      (revision 2510)
+++ expr.c      (working copy)
@@ -7654,6 +7654,16 @@ expand_expr_real_1 (tree exp, rtx target
              {
                if (target == 0)
                  target = assign_temp (type, 0, 1, 1);
+
+               /* If we don't have a memory location for op0, make a new
location for it. */
+               if (!MEM_P (op0))
+                 {
+                   rtx op0_mem = assign_stack_temp (GET_MODE (op0),
+                                                    GET_MODE_SIZE (GET_MODE
(op0)),
+                                                    0);
+                   emit_move_insn (op0_mem, op0);
+                   op0 = op0_mem;
+                 }

                if (bitsize == 0)
                  return target;


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444

[Bug middle-end/36444] [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[rguenth at gcc dot gnu dot org]

-- 

rguenth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P2


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444

[Bug middle-end/36444] [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[pinskia at gcc dot gnu dot org]

------- Comment #3 from pinskia at gcc dot gnu dot org  2008-06-30 00:29 -------
Mine, I will post the patch for this later this week.


-- 

pinskia at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         AssignedTo|unassigned at gcc dot gnu   |pinskia at gcc dot gnu dot
                   |dot org                     |org
             Status|UNCONFIRMED                 |ASSIGNED
     Ever Confirmed|0                           |1
   Last reconfirmed|0000-00-00 00:00:00         |2008-06-30 00:29:08
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444

[Bug middle-end/36444] [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[hjl dot tools at gmail dot com]

------- Comment #4 from hjl dot tools at gmail dot com  2008-08-28 21:14 -------
(In reply to comment #1)
> Fix for at least PowerPC (we should be trying to get the correct sized vector
> mode):
> Index: expmed.c
> ===================================================================
> --- expmed.c    (revision 2510)
> +++ expmed.c    (working copy)
> @@ -1129,7 +1129,7 @@ extract_bit_field (rtx str_rtx, unsigned
>         new_mode = MIN_MODE_VECTOR_INT;
> 
>        for (; new_mode != VOIDmode ; new_mode = GET_MODE_WIDER_MODE (new_mode))
> -       if (GET_MODE_NUNITS (new_mode) == nunits
> +       if (GET_MODE_SIZE (new_mode) == GET_MODE_SIZE (new_mode)

I may have missed something. Is this always true?

>             && GET_MODE_INNER (new_mode) == tmode
>             && targetm.vector_mode_supported_p (new_mode))
>           break;
> 


-- 

hjl dot tools at gmail dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |hjl dot tools at gmail dot
                   |                            |com


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444

[Bug middle-end/36444] [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[pinskia at gcc dot gnu dot org]

------- Comment #5 from pinskia at gcc dot gnu dot org  2008-08-28 21:19 -------
(In reply to comment #4)
> (In reply to comment #1)
> > Fix for at least PowerPC (we should be trying to get the correct sized vector
> > mode):
> > Index: expmed.c
> > ===================================================================
> > --- expmed.c    (revision 2510)
> > +++ expmed.c    (working copy)
> > @@ -1129,7 +1129,7 @@ extract_bit_field (rtx str_rtx, unsigned
> >         new_mode = MIN_MODE_VECTOR_INT;
> > 
> >        for (; new_mode != VOIDmode ; new_mode = GET_MODE_WIDER_MODE (new_mode))
> > -       if (GET_MODE_NUNITS (new_mode) == nunits
> > +       if (GET_MODE_SIZE (new_mode) == GET_MODE_SIZE (new_mode)
> 
> I may have missed something. Is this always true?

Try replacing one of the new_mode with GET_MODE (op0) :).

-- Pinski


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444

[Bug middle-end/36444] [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[hjl dot tools at gmail dot com]

------- Comment #6 from hjl dot tools at gmail dot com  2008-08-28 21:28 -------
(In reply to comment #5)
> (In reply to comment #4)
> > (In reply to comment #1)
> > > Fix for at least PowerPC (we should be trying to get the correct sized vector
> > > mode):
> > > Index: expmed.c
> > > ===================================================================
> > > --- expmed.c    (revision 2510)
> > > +++ expmed.c    (working copy)
> > > @@ -1129,7 +1129,7 @@ extract_bit_field (rtx str_rtx, unsigned
> > >         new_mode = MIN_MODE_VECTOR_INT;
> > > 
> > >        for (; new_mode != VOIDmode ; new_mode = GET_MODE_WIDER_MODE (new_mode))
> > > -       if (GET_MODE_NUNITS (new_mode) == nunits
> > > +       if (GET_MODE_SIZE (new_mode) == GET_MODE_SIZE (new_mode)
> > 
> > I may have missed something. Is this always true?
> 
> Try replacing one of the new_mode with GET_MODE (op0) :).
> 

Both patches avoid ICE on my testcase. But my patch generates short code.
Can you try my patch on your testcase?


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444

[Bug middle-end/36444] [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[hjl dot tools at gmail dot com]

------- Comment #7 from hjl dot tools at gmail dot com  2008-08-28 21:49 -------
*** Bug 37269 has been marked as a duplicate of this bug. ***


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444

[Bug middle-end/36444] [4.4 Regression] ICE in gen_lowpart_general with -O1 with vector registers

[pinskia at gcc dot gnu dot org]

------- Comment #8 from pinskia at gcc dot gnu dot org  2008-08-31 02:45 -------
Fixed.


-- 

pinskia at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|                            |FIXED


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36444