From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 20417 invoked by alias); 2 Aug 2008 13:10:23 -0000 Received: (qmail 20133 invoked by uid 48); 2 Aug 2008 13:08:59 -0000 Date: Sat, 02 Aug 2008 13:10:00 -0000 Message-ID: <20080802130859.20132.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug target/36992] Very stange code for _mm_move_epi64 In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "ubizjak at gmail dot com" Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2008-08/txt/msg00112.txt.bz2 ------- Comment #9 from ubizjak at gmail dot com 2008-08-02 13:08 ------- Hm, IA-32 Intel® Architecture Software DeveloperÂ’s Manual says about movq: Operation MOVQ instruction when operating on MMX technology registers and memory locations: DEST ← SRC; MOVQ instruction when source and destination operands are XMM registers: DEST[63:0] ← SRC[63:0]; MOVQ instruction when source operand is XMM register and destination operand is memory location: DEST ← SRC[63:0]; MOVQ instruction when source operand is memory location and destination operand is XMM register: DEST[63:0] ← SRC; DEST[127:64] ← 0000000000000000H; Please note, that the documentation doesn't say anything about clearing destination bits [127:64] when both source and destination are in XMM register. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36992