From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29972 invoked by alias); 21 Nov 2008 07:31:00 -0000 Received: (qmail 21625 invoked by alias); 21 Nov 2008 07:29:49 -0000 Date: Fri, 21 Nov 2008 07:31:00 -0000 Message-ID: <20081121072949.21624.qmail@sourceware.org> X-Bugzilla-Reason: CC References: Subject: [Bug middle-end/37908] atomic NAND op generate wrong code; __sync_nand_and_fetch, __sync_fetch_and_nand In-Reply-To: Reply-To: gcc-bugzilla@gcc.gnu.org To: gcc-bugs@gcc.gnu.org From: "uros at gcc dot gnu dot org" Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2008-11/txt/msg01762.txt.bz2 ------- Comment #12 from uros at gcc dot gnu dot org 2008-11-21 07:29 ------- Subject: Bug 37908 Author: uros Date: Fri Nov 21 07:28:27 2008 New Revision: 142082 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=142082 Log: PR middle-end/37908 * config/ia64/ia64.c (ia64_expand_atomic_ope): Properly handle NAND case by calculating ~(new_reg & val) instead of (~new_reg & val). * config/ia64/sync.md (sync_nand): Change insn RTX to (not:IMODE (and:IMODE (...))). (sync_old_nand): Ditto. (sync_new_nand): Ditto. Modified: trunk/gcc/ChangeLog trunk/gcc/config/ia64/ia64.c trunk/gcc/config/ia64/sync.md trunk/gcc/testsuite/ChangeLog -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37908