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References: <bug-39139-87@http.gcc.gnu.org/bugzilla/>
Subject: [Bug target/39139] [4.4 Regression] ICE with stringop and register var
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------- Comment #24 from jakub at gcc dot gnu dot org  2009-02-10 10:20 -------
Their loads and stores are already separated from other computations, as
they aren't is_gimple_reg.  And they do have VDEFs/VUSES:
  # a1D.1284_24 = VDEF <a1D.1284_23(D)> { a1D.1284 }
  a1D.1284 = 11;
  y.0D.1287_15 = (long unsigned intD.4) &eD.1268;
  # a2D.1285_26 = VDEF <a2D.1285_25(D)> { a2D.1285 }
  a2D.1285 = y.0D.1287_15;
  # eD.1268_28 = VDEF <eD.1268_22>
  # rD.1283_29 = VDEF <rD.1283_27(D)>
  # a1D.1284_30 = VDEF <a1D.1284_24>
  # a2D.1285_31 = VDEF <a2D.1285_26> { eD.1268 rD.1283 a1D.1284 a2D.1285 }
  __asm__ __volatile__("" : "=r" rD.1283, "=r" a1D.1284, "=r" a2D.1285 : "1"
a1D.1284 : "2" a2D.1285 : "memory");

But that is not enough to prevent sinking in between these, sinking of e = {}
looks solely at eD.1268_* VUSEs and the immediate user is therefore the asm.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39139