[Bug c/40067] New: gcc should use brz(brnz) instead of cmp/be(bne) when possible

[Bug c/40067] New: gcc should use brz(brnz) instead of cmp/be(bne) when possible

[scovich at gmail dot com]

Compiling the following function with -O3 gives the following assembly output:

void spin(int volatile* ptr) {
    while(*ptr);
    return;
}

spin:
.LLFB1:
        .register       %g2, #scratch
        lduw    [%o0], %g1      ! 8     *zero_extendsidi2_insn_sp64/2   [length
= 1]
        cmp     %g1, 0  ! 9     *cmpsi_insn     [length = 1]
        be,pn   %icc, .LL3      ! 10    *normal_branch  [length = 1]
         mov    0, %g1  ! 17    *movdi_insn_sp64/1      [length = 1]
.LL6:   
        lduw    [%o0], %g2      ! 20    *zero_extendsidi2_insn_sp64/2   [length
= 1]
        cmp     %g2, 0  ! 22    *cmpsi_insn     [length = 1]
        bne,pt  %icc, .LL6      ! 23    *normal_branch  [length = 1]
         add    %g1, 1, %g1     ! 19    *adddi3_sp64/1  [length = 1]
.LL3:   
        jmp     %o7+8   ! 55    *return_internal        [length = 1]
         mov    %g1, %o0        ! 30    *movdi_insn_sp64/1      [length = 1]

Manually replacing the cmp/b* pairs with br* instructions gives 10-11% more
iterations/sec on my machine:

        .global spin_brz
spin_brz:
        .register %g2, #scratch
        ld        [%o0], %g1
        brz,pn    %g1, spin_brz_done
        clr       %g1
spin_brz_again:
        ld        [%o0], %g2
        brnz,pt   %g2, spin_brz_again
        add       %g1, 0x1, %g1
spin_brz_done:
        retl
        mov       %g1, %o0
        .size   spin_brz, .- spin_brz


-- 
           Summary: gcc should use brz(brnz) instead of cmp/be(bne) when
                    possible
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: scovich at gmail dot com
GCC target triplet: sparc-sun-solaris2.10


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40067

[Bug middle-end/40067] gcc should use brz(brnz) instead of cmp/be(bne) when possible

[scovich at gmail dot com]

------- Comment #1 from scovich at gmail dot com  2009-05-08 09:38 -------
Sorry, the C code should have been:

long spin(int volatile* ptr) {
    long rval=0;
    while(*ptr) rval++;
    return rval;
}


-- 

scovich at gmail dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|c                           |middle-end
            Version|unknown                     |4.4.0


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40067

[Bug target/40067] use brz instead of cmp/be with 32-bit values

[ebotcazou at gcc dot gnu dot org]

------- Comment #2 from ebotcazou at gcc dot gnu dot org  2009-05-08 10:17 -------
brz is not used because *ptr is an int, it would be used with a long.


-- 

ebotcazou at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|normal                      |enhancement
             Status|UNCONFIRMED                 |NEW
          Component|middle-end                  |target
     Ever Confirmed|0                           |1
 GCC target triplet|sparc-sun-solaris2.10       |sparc64-sun-solaris2.10
   Last reconfirmed|0000-00-00 00:00:00         |2009-05-08 10:17:51
               date|                            |
            Summary|gcc should use brz(brnz)    |use brz instead of cmp/be
                   |instead of cmp/be(bne) when |with 32-bit values
                   |possible                    |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40067

[Bug target/40067] use brz instead of cmp/be with 32-bit values

[scovich at gmail dot com]

------- Comment #3 from scovich at gmail dot com  2009-05-08 11:30 -------
>           What    |Removed                     |Added
>----------------------------------------------------------------------------
> GCC target triplet|sparc-sun-solaris2.10       |sparc64-sun-solaris2.10

I think this affects 32-bit sparc as well, unless the br* instructions are new
in sparcv9 (they don't seem to be). The only difference with v9 seems to be
that 32-bit code needs to use ldsw to sign-extend if needed.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40067

[Bug target/40067] use brz instead of cmp/be with 32-bit values

[ebotcazou at gcc dot gnu dot org]

------- Comment #4 from ebotcazou at gcc dot gnu dot org  2009-05-08 15:06 -------
> I think this affects 32-bit sparc as well, unless the br* instructions are new
> in sparcv9 (they don't seem to be).

Yes, they are new in V9 and operate only on the full 64-bit register.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40067